diff options
37 files changed, 245 insertions, 134 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index c6ad8ce48..7d62297a9 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -31,7 +31,6 @@ from m5 import makeList from m5.objects import * from Benchmarks import * from FullO3Config import * -from Util import * class CowIdeDisk(IdeDisk): image = CowDiskImage(child=RawDiskImage(read_only=True), @@ -47,7 +46,7 @@ class BaseTsunami(Tsunami): ide = IdeController(disks=[Parent.disk0, Parent.disk2], pci_func=0, pci_dev=0, pci_bus=0) -def makeLinuxAlphaSystem(cpu, mem_mode, mdesc, icache=None, dcache=None, l2cache=None): +def makeLinuxAlphaSystem(mem_mode, mdesc): self = LinuxAlphaSystem() self.readfile = mdesc.script() self.iobus = Bus(bus_id=0) @@ -72,13 +71,7 @@ def makeLinuxAlphaSystem(cpu, mem_mode, mdesc, icache=None, dcache=None, l2cache self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(), read_only = True)) self.intrctrl = IntrControl() - self.cpu = cpu self.mem_mode = mem_mode - connectCpu(self.cpu, self.membus, icache, dcache, l2cache) - for each_cpu in makeList(self.cpu): - each_cpu.itb = AlphaITB() - each_cpu.dtb = AlphaDTB() - self.cpu.clock = '2GHz' self.sim_console = SimConsole(listener=ConsoleListener(port=3456)) self.kernel = binary('vmlinux') self.pal = binary('ts_osfpal') diff --git a/configs/test/fs.py b/configs/test/fs.py index 8686cdb5b..4a3876b36 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -5,7 +5,6 @@ from m5.objects import * m5.AddToPath('../common') from FSConfig import * from SysPaths import * -from Util import * from Benchmarks import * parser = optparse.OptionParser() @@ -50,12 +49,15 @@ if options.benchmark: bm = Benchmarks[options.benchmark] if len(bm) == 2: - root = makeDualRoot(makeLinuxAlphaSystem(cpu, mem_mode, bm[0]), - makeLinuxAlphaSystem(cpu2, mem_mode, bm[1])) - + s1 = makeLinuxAlphaSystem(mem_mode, bm[0]) + s2 = makeLinuxAlphaSystem(mem_mode, bm[1]) + cpu.connectMemPorts(s1.membus) + cpu2.connectMemPorts(s2.membus) + root = makeDualRoot(s1, s2) elif len(bm) == 1: root = Root(clock = '1THz', - system = makeLinuxAlphaSystem(cpu, mem_mode, bm[0])) + system = makeLinuxAlphaSystem(mem_mode, bm[0])) + cpu.connectMemPorts(root.system.membus) else: print "Error I don't know how to create more than 2 systems." sys.exit(1) diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py index 5bf98be9c..4144397a6 100644 --- a/src/python/m5/objects/BaseCPU.py +++ b/src/python/m5/objects/BaseCPU.py @@ -1,5 +1,7 @@ from m5 import build_env from m5.config import * +from AlphaTLB import AlphaDTB, AlphaITB +from Bus import Bus class BaseCPU(SimObject): type = 'BaseCPU' @@ -8,8 +10,8 @@ class BaseCPU(SimObject): system = Param.System(Parent.any, "system object") if build_env['FULL_SYSTEM']: - dtb = Param.AlphaDTB("Data TLB") - itb = Param.AlphaITB("Instruction TLB") + dtb = Param.AlphaDTB(AlphaDTB(), "Data TLB") + itb = Param.AlphaITB(AlphaITB(), "Instruction TLB") cpu_id = Param.Int(-1, "CPU identifier") else: workload = VectorParam.Process("processes to run") @@ -27,3 +29,25 @@ class BaseCPU(SimObject): "defer registration with system (for sampling)") clock = Param.Clock(Parent.clock, "clock speed") + + _mem_ports = [] + + def connectMemPorts(self, bus): + for p in self._mem_ports: + exec('self.%s = bus.port' % p) + + def addPrivateSplitL1Caches(self, ic, dc): + assert(len(self._mem_ports) == 2) + self.icache = ic + self.dcache = dc + self.icache_port = ic.cpu_side + self.dcache_port = dc.cpu_side + self._mem_ports = ['icache.mem_side', 'dcache.mem_side'] + + def addTwoLevelCacheHierarchy(self, ic, dc, l2c): + self.addPrivateSplitL1Caches(ic, dc) + self.toL2Bus = Bus() + self.connectMemPorts(self.toL2Bus) + self.l2cache = l2c + self.l2cache.cpu_side = toL2Bus.port + self._mem_ports = ['l2cache.mem_side'] diff --git a/src/python/m5/objects/O3CPU.py b/src/python/m5/objects/O3CPU.py index 41208929a..900bbf28c 100644 --- a/src/python/m5/objects/O3CPU.py +++ b/src/python/m5/objects/O3CPU.py @@ -22,6 +22,7 @@ class DerivO3CPU(BaseCPU): cachePorts = Param.Unsigned("Cache Ports") icache_port = Port("Instruction Port") dcache_port = Port("Data Port") + _mem_ports = ['icache_port', 'dcache_port'] decodeToFetchDelay = Param.Unsigned(1, "Decode to fetch delay") renameToFetchDelay = Param.Unsigned(1 ,"Rename to fetch delay") diff --git a/tests/SConscript b/tests/SConscript index 7ccb77759..80131057d 100644 --- a/tests/SConscript +++ b/tests/SConscript @@ -139,130 +139,65 @@ def update_test_string(target, source, env): updateAction = env.Action(update_test, update_test_string) -def test_builder(env, category, cpu_list=[], os_list=[], refdir='ref', - timeout=15): - """Define a test. - - Args: - category -- string describing test category (e.g., 'quick') - cpu_list -- list of CPUs to runs this test on (blank means all compiled CPUs) - os_list -- list of OSs to run this test on - refdir -- subdirectory containing reference output (default 'ref') - timeout -- test timeout in minutes (only enforced on pool) - - """ - - default_refdir = False - if refdir == 'ref': - default_refdir = True - valid_cpu_list = [] - if len(cpu_list) == 0: - valid_cpu_list = env['CPU_MODELS'] +def test_builder(env, ref_dir): + """Define a test.""" + + (category, name, _ref, isa, opsys, config) = ref_dir.split('/') + assert(_ref == 'ref') + + # target path (where test output goes) is the same except without + # the 'ref' component + tgt_dir = os.path.join(category, name, isa, opsys, config) + + # prepend file name with tgt_dir + def tgt(f): + return os.path.join(tgt_dir, f) + + ref_stats = os.path.join(ref_dir, 'm5stats.txt') + new_stats = tgt('m5stats.txt') + status_file = tgt('status') + + # Base command for running test. We mess around with indirectly + # referring to files via SOURCES and TARGETS so that scons can + # mess with paths all it wants to and we still get the right + # files. + base_cmd = '${SOURCES[0]} -d $TARGET.dir ${SOURCES[1]} %s' % tgt_dir + # stdout and stderr files + cmd_stdout = '${TARGETS[0]}' + cmd_stderr = '${TARGETS[1]}' + + # Prefix test run with batch job submission command if appropriate. + # Output redirection is also different for batch runs. + # Batch command also supports timeout arg (in seconds, not minutes). + if env['BATCH']: + cmd = [env['BATCH_CMD'], '-t', str(timeout * 60), + '-o', cmd_stdout, '-e', cmd_stderr, base_cmd] else: - for i in cpu_list: - if i in env['CPU_MODELS']: - valid_cpu_list.append(i) - cpu_list = valid_cpu_list - if env['TEST_CPU_MODELS']: - valid_cpu_list = [] - for i in env['TEST_CPU_MODELS']: - if i in cpu_list: - valid_cpu_list.append(i) - cpu_list = valid_cpu_list -# Code commented out that shows the general structure if we want to test -# different OS's as well. -# if len(os_list) == 0: -# for test_cpu in cpu_list: -# build_cpu_test(env, category, '', test_cpu, refdir, timeout) -# else: -# for test_os in os_list: -# for test_cpu in cpu_list: -# build_cpu_test(env, category, test_os, test_cpu, refdir, -# timeout) - # Loop through CPU models and generate proper options, ref directories - for cpu in cpu_list: - test_os = '' - if cpu == "AtomicSimpleCPU": - cpu_option = ('','atomic/') - elif cpu == "TimingSimpleCPU": - cpu_option = ('--timing','timing/') - elif cpu == "O3CPU": - cpu_option = ('--detailed','detailed/') - else: - raise TypeError, "Unknown CPU model specified" - - if default_refdir: - # Reference stats located in ref/arch/os/cpu or ref/arch/cpu - # if no OS specified - test_refdir = os.path.join(refdir, env['TARGET_ISA']) - if test_os != '': - test_refdir = os.path.join(test_refdir, test_os) - cpu_refdir = os.path.join(test_refdir, cpu_option[1]) - - ref_stats = os.path.join(cpu_refdir, 'm5stats.txt') - - # base command for running test - base_cmd = '${SOURCES[0]} -d $TARGET.dir ${SOURCES[1]}' - base_cmd = base_cmd + ' ' + cpu_option[0] - # stdout and stderr files - cmd_stdout = '${TARGETS[0]}' - cmd_stderr = '${TARGETS[1]}' - - stdout_string = cpu_option[1] + 'stdout' - stderr_string = cpu_option[1] + 'stderr' - m5stats_string = cpu_option[1] + 'm5stats.txt' - outdiff_string = cpu_option[1] + 'outdiff' - statsdiff_string = cpu_option[1] + 'statsdiff' - status_string = cpu_option[1] + 'status' - - # Prefix test run with batch job submission command if appropriate. - # Output redirection is also different for batch runs. - # Batch command also supports timeout arg (in seconds, not minutes). - if env['BATCH']: - cmd = [env['BATCH_CMD'], '-t', str(timeout * 60), - '-o', cmd_stdout, '-e', cmd_stderr, base_cmd] - else: - cmd = [base_cmd, '>', cmd_stdout, '2>', cmd_stderr] + cmd = [base_cmd, '>', cmd_stdout, '2>', cmd_stderr] - env.Command([stdout_string, stderr_string, m5stats_string], - [env.M5Binary, 'run.py'], ' '.join(cmd)) - - # order of targets is important... see check_test - env.Command([outdiff_string, statsdiff_string, status_string], - [ref_stats, m5stats_string], - testAction) - - # phony target to echo status - if env['update_ref']: - p = env.Command(cpu_option[1] + '_update', - [ref_stats, m5stats_string, status_string], - updateAction) - else: - p = env.Command(cpu_option[1] + '_print', [status_string], - printAction) - env.AlwaysBuild(p) + env.Command([tgt('stdout'), tgt('stderr'), new_stats], + [env.M5Binary, 'run.py'], ' '.join(cmd)) + + # order of targets is important... see check_test + env.Command([tgt('outdiff'), tgt('statsdiff'), status_file], + [ref_stats, new_stats], + testAction) + + # phony target to echo status + if env['update_ref']: + p = env.Command(tgt('_update'), + [ref_stats, new_stats, status_file], + updateAction) + else: + p = env.Command(tgt('_print'), [status_file], printAction) - env.Tests.setdefault(category, []) - env.Tests[category] += p + env.AlwaysBuild(p) -# Make test_builder a "wrapper" function. See SCons wiki page at -# http://www.scons.org/cgi-bin/wiki/WrapperFunctions. -SConsEnvironment.Test = test_builder cwd = os.getcwd() os.chdir(str(Dir('.').srcdir)) -scripts = glob.glob('*/SConscript') +for config in ['simple-atomic']: + dirs = glob.glob('*/*/ref/%s/*/%s' % (env['TARGET_ISA'], config)) + for d in dirs: + test_builder(env, d) os.chdir(cwd) - -for s in scripts: - SConscript(s, exports = 'env', duplicate = False) - -# Set up phony commands for various test categories -allTests = [] -for (key, val) in env.Tests.iteritems(): - env.Command(key, val, env.NoAction) - allTests += val - -# The 'all' target is redundant since just specifying the test -# directory name (e.g., ALPHA_SE/test/opt) has the same effect. -env.Command('all', allTests, env.NoAction) diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stderr b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stderr new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stderr diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stderr b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stderr new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stderr diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout diff --git a/tests/quick/00.hello/test.py b/tests/quick/00.hello/test.py new file mode 100644 index 000000000..fd8fd5abd --- /dev/null +++ b/tests/quick/00.hello/test.py @@ -0,0 +1,29 @@ +# Copyright (c) 2006 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Steve Reinhardt + +root.system.cpu.workload = LiveProcess(file = binpath('hello')) diff --git a/tests/test1/ref/alpha/detailed/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/detailed/config.ini index a442ec572..a442ec572 100644 --- a/tests/test1/ref/alpha/detailed/config.ini +++ b/tests/quick/20.eio-short/ref/alpha/eio/detailed/config.ini diff --git a/tests/test1/ref/alpha/detailed/config.out b/tests/quick/20.eio-short/ref/alpha/eio/detailed/config.out index c92557696..c92557696 100644 --- a/tests/test1/ref/alpha/detailed/config.out +++ b/tests/quick/20.eio-short/ref/alpha/eio/detailed/config.out diff --git a/tests/test1/ref/alpha/detailed/m5stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/detailed/m5stats.txt index 119cc8e9d..119cc8e9d 100644 --- a/tests/test1/ref/alpha/detailed/m5stats.txt +++ b/tests/quick/20.eio-short/ref/alpha/eio/detailed/m5stats.txt diff --git a/tests/test1/ref/alpha/detailed/stderr b/tests/quick/20.eio-short/ref/alpha/eio/detailed/stderr index 7ded22db8..7ded22db8 100644 --- a/tests/test1/ref/alpha/detailed/stderr +++ b/tests/quick/20.eio-short/ref/alpha/eio/detailed/stderr diff --git a/tests/test1/ref/alpha/detailed/stdout b/tests/quick/20.eio-short/ref/alpha/eio/detailed/stdout index ee0eb672e..ee0eb672e 100644 --- a/tests/test1/ref/alpha/detailed/stdout +++ b/tests/quick/20.eio-short/ref/alpha/eio/detailed/stdout diff --git a/tests/test1/ref/alpha/atomic/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini index 4cbe1fce6..4cbe1fce6 100644 --- a/tests/test1/ref/alpha/atomic/config.ini +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini diff --git a/tests/test1/ref/alpha/atomic/config.out b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out index 65a9f6f7f..65a9f6f7f 100644 --- a/tests/test1/ref/alpha/atomic/config.out +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out diff --git a/tests/test1/ref/alpha/atomic/m5stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt index 29c0b91ac..29c0b91ac 100644 --- a/tests/test1/ref/alpha/atomic/m5stats.txt +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt diff --git a/tests/test1/ref/alpha/atomic/stderr b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stderr index 4e444fa6b..4e444fa6b 100644 --- a/tests/test1/ref/alpha/atomic/stderr +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stderr diff --git a/tests/test1/ref/alpha/atomic/stdout b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout index 80b37e259..80b37e259 100644 --- a/tests/test1/ref/alpha/atomic/stdout +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout diff --git a/tests/test1/ref/alpha/timing/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini index c4c381b93..c4c381b93 100644 --- a/tests/test1/ref/alpha/timing/config.ini +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini diff --git a/tests/test1/ref/alpha/timing/config.out b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out index 882db9c06..882db9c06 100644 --- a/tests/test1/ref/alpha/timing/config.out +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out diff --git a/tests/test1/ref/alpha/timing/m5stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt index 5f7766bac..5f7766bac 100644 --- a/tests/test1/ref/alpha/timing/m5stats.txt +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt diff --git a/tests/test1/ref/alpha/timing/stderr b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr index 4e444fa6b..4e444fa6b 100644 --- a/tests/test1/ref/alpha/timing/stderr +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr diff --git a/tests/test1/ref/alpha/timing/stdout b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout index c14f4a3c9..c14f4a3c9 100644 --- a/tests/test1/ref/alpha/timing/stdout +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout diff --git a/tests/quick/20.eio-short/test.py b/tests/quick/20.eio-short/test.py new file mode 100644 index 000000000..67e83d66e --- /dev/null +++ b/tests/quick/20.eio-short/test.py @@ -0,0 +1,30 @@ +# Copyright (c) 2006 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Steve Reinhardt + +root.system.cpu.workload = EioProcess(file = binpath('anagram-vshort.eio.gz')) +root.system.cpu.max_insts_any_thread = 500000 diff --git a/tests/run.py b/tests/run.py new file mode 100644 index 000000000..ae9d46258 --- /dev/null +++ b/tests/run.py @@ -0,0 +1,62 @@ +# Copyright (c) 2006 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Steve Reinhardt + +import os, sys + +# single "path" arg encodes everything we need to know about test +(category, name, isa, opsys, config) = sys.argv[1].split('/') + +# find path to directory containing this file +tests_root = os.path.dirname(__file__) +test_progs = os.path.join(tests_root, 'test-progs') + +# generate path to binary file +def binpath(app, file=None): + # executable has same name as app unless specified otherwise + if not file: + file = app + return os.path.join(test_progs, app, 'bin', isa, opsys, file) + +# build configuration +execfile(os.path.join(tests_root, config + '.py')) + +# set default maxtick... script can override +# -1 means run forever +maxtick = -1 + +# tweak configuration for specific test + +execfile(os.path.join(tests_root, category, name, 'test.py')) + +# instantiate configuration +m5.instantiate(root) + +# simulate until program terminates +exit_event = m5.simulate(maxtick) + +print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() diff --git a/tests/simple-atomic.py b/tests/simple-atomic.py new file mode 100644 index 000000000..e3eb62ef0 --- /dev/null +++ b/tests/simple-atomic.py @@ -0,0 +1,12 @@ +import m5 +from m5.objects import * +m5.AddToPath('../configs/common') +from SEConfig import * + +system = System(cpu = AtomicSimpleCPU(), + physmem = PhysicalMemory(), + membus = Bus()) +system.physmem.port = system.membus.port +system.cpu.connectMemPorts(system.membus) + +root = Root(system = system) diff --git a/tests/simple-timing.py b/tests/simple-timing.py new file mode 100644 index 000000000..b3d11e069 --- /dev/null +++ b/tests/simple-timing.py @@ -0,0 +1,23 @@ +import m5 +from m5.objects import * +m5.AddToPath('../configs/common') +from SEConfig import * + +class MyCache(BaseCache): + assoc = 2 + block_size = 64 + latency = 1 + mshrs = 10 + tgts_per_mshr = 5 + +cpu = TimingSimpleCPU() +cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'), + MyCache(size = '2MB')) + +system = System(cpu = cpu, + physmem = PhysicalMemory(), + membus = Bus()) +system.physmem.port = system.membus.port +cpu.connectMemPorts(system.membus) + +root = Root(system = system) diff --git a/configs/test/hello b/tests/test-progs/hello/bin/alpha/linux/hello Binary files differindex 59c0d195c..59c0d195c 100755 --- a/configs/test/hello +++ b/tests/test-progs/hello/bin/alpha/linux/hello diff --git a/configs/test/hello_mips b/tests/test-progs/hello/bin/mips/linux/hello_mips Binary files differindex a3db001ec..a3db001ec 100755 --- a/configs/test/hello_mips +++ b/tests/test-progs/hello/bin/mips/linux/hello_mips diff --git a/configs/test/sparc_tests/hello_sparc b/tests/test-progs/hello/bin/sparc/bin Binary files differindex e254ae33f..e254ae33f 100755 --- a/configs/test/sparc_tests/hello_sparc +++ b/tests/test-progs/hello/bin/sparc/bin |