summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index c9ace4790..61adde8d1 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -445,5 +445,27 @@ let {{
self.mnemonic = "lea"
microopClasses["lea"] = LeaOp
+
+
+ iop = InstObjParams("cda", "Cda", 'X86ISA::LdStOp',
+ {"code": '''
+ Addr paddr;
+ fault = xc->translateDataWriteAddr(EA, paddr,
+ dataSize, (1 << segment));
+ ''',
+ "ea_code": calculateEA})
+ header_output += MicroLeaDeclare.subst(iop)
+ decoder_output += MicroLdStOpConstructor.subst(iop)
+ exec_output += MicroLeaExecute.subst(iop)
+
+ class CdaOp(LdStOp):
+ def __init__(self, segment, addr, disp = 0,
+ dataSize="env.dataSize", addressSize="env.addressSize"):
+ super(CdaOp, self).__init__("NUM_INTREGS", segment,
+ addr, disp, dataSize, addressSize)
+ self.className = "Cda"
+ self.mnemonic = "cda"
+
+ microopClasses["cda"] = CdaOp
}};