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-rw-r--r--src/python/swig/pyobject.cc24
1 files changed, 16 insertions, 8 deletions
diff --git a/src/python/swig/pyobject.cc b/src/python/swig/pyobject.cc
index 20dd1deb1..5ae2aa177 100644
--- a/src/python/swig/pyobject.cc
+++ b/src/python/swig/pyobject.cc
@@ -34,13 +34,17 @@
#include "base/inifile.hh"
#include "base/output.hh"
-#include "dev/etherdevice.hh"
-#include "dev/etherobject.hh"
-#include "dev/etherint.hh"
+#include "config/full_system.hh"
#include "mem/mem_object.hh"
#include "mem/port.hh"
#include "sim/sim_object.hh"
+#if FULL_SYSTEM
+#include "dev/etherdevice.hh"
+#include "dev/etherobject.hh"
+#include "dev/etherint.hh"
+#endif
+
using namespace std;
/**
@@ -61,6 +65,8 @@ lookupPort(SimObject *so, const std::string &name, int i)
return p;
}
+#if FULL_SYSTEM
+
EtherInt *
lookupEthPort(SimObject *so, const std::string &name, int i)
{
@@ -78,6 +84,7 @@ lookupEthPort(SimObject *so, const std::string &name, int i)
p = ed->getEthPort(name, i);
return p;
}
+#endif
/**
* Connect the described MemObject ports. Called from Python via SWIG.
@@ -87,17 +94,18 @@ int
connectPorts(SimObject *o1, const std::string &name1, int i1,
SimObject *o2, const std::string &name2, int i2)
{
- EtherObject *eo1, *eo2;
- EtherDevice *ed1, *ed2;
MemObject *mo1, *mo2;
+ mo1 = dynamic_cast<MemObject*>(o1);
+ mo2 = dynamic_cast<MemObject*>(o2);
+#if FULL_SYSTEM
+ EtherObject *eo1, *eo2;
+ EtherDevice *ed1, *ed2;
eo1 = dynamic_cast<EtherObject*>(o1);
ed1 = dynamic_cast<EtherDevice*>(o1);
- mo1 = dynamic_cast<MemObject*>(o1);
eo2 = dynamic_cast<EtherObject*>(o2);
ed2 = dynamic_cast<EtherDevice*>(o2);
- mo2 = dynamic_cast<MemObject*>(o2);
if ((eo1 || ed1) && (eo2 || ed2)) {
EtherInt *p1 = lookupEthPort(o1, name1, i1);
@@ -111,7 +119,7 @@ connectPorts(SimObject *o1, const std::string &name1, int i1,
return 1;
}
}
-
+#endif
Port *p1 = lookupPort(o1, name1, i1);
Port *p2 = lookupPort(o2, name2, i2);