diff options
| -rw-r--r-- | src/cpu/o3/rename_impl.hh | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index e27c66dcd..341ba8804 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -600,6 +600,18 @@ DefaultRename<Impl>::renameInsts(ThreadID tid) DPRINTF(Rename, "[tid:%u]: Processing instruction [sn:%lli] with " "PC %s.\n", tid, inst->seqNum, inst->pcState()); + // Check here to make sure there are enough destination registers + // to rename to. Otherwise block. + if (renameMap[tid]->numFreeEntries() < inst->numDestRegs()) { + DPRINTF(Rename, "Blocking due to lack of free " + "physical registers to rename to.\n"); + blockThisCycle = true; + insts_to_rename.push_front(inst); + ++renameFullRegistersEvents; + + break; + } + // Handle serializeAfter/serializeBefore instructions. // serializeAfter marks the next instruction as serializeBefore. // serializeBefore makes the instruction wait in rename until the ROB @@ -641,18 +653,6 @@ DefaultRename<Impl>::renameInsts(ThreadID tid) serializeAfter(insts_to_rename, tid); } - // Check here to make sure there are enough destination registers - // to rename to. Otherwise block. - if (renameMap[tid]->numFreeEntries() < inst->numDestRegs()) { - DPRINTF(Rename, "Blocking due to lack of free " - "physical registers to rename to.\n"); - blockThisCycle = true; - insts_to_rename.push_front(inst); - ++renameFullRegistersEvents; - - break; - } - renameSrcRegs(inst, inst->threadNumber); renameDestRegs(inst, inst->threadNumber); |