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-rw-r--r--src/arch/arm/miscregs.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc
index 313ac18f9..4c950a643 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/miscregs.cc
@@ -770,7 +770,7 @@ bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
// MISCREG_CPUMERRSR
bitset<NUM_MISCREG_INFOS>(string("1111111111000000000")),
// MISCREG_L2MERRSR
- bitset<NUM_MISCREG_INFOS>(string("1111111111000000000")),
+ bitset<NUM_MISCREG_INFOS>(string("1111111111000000010")),
// AArch64 registers (Op0=2)
// MISCREG_MDCCINT_EL1
@@ -1330,7 +1330,7 @@ bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
// MISCREG_CPUMERRSR_EL1
bitset<NUM_MISCREG_INFOS>(string("1111111111000000001")),
// MISCREG_L2MERRSR_EL1
- bitset<NUM_MISCREG_INFOS>(string("1111111111000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("1111111111000000010")),
// MISCREG_CBAR_EL1
bitset<NUM_MISCREG_INFOS>(string("0101010101000000001")),