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-rw-r--r--src/mem/cache/tags/skewed_assoc.cc5
-rw-r--r--src/mem/cache/tags/skewed_assoc.hh3
2 files changed, 8 insertions, 0 deletions
diff --git a/src/mem/cache/tags/skewed_assoc.cc b/src/mem/cache/tags/skewed_assoc.cc
index 044f8a3d7..b3945d0c4 100644
--- a/src/mem/cache/tags/skewed_assoc.cc
+++ b/src/mem/cache/tags/skewed_assoc.cc
@@ -37,6 +37,7 @@
#include <vector>
+#include "base/bitfield.hh"
#include "base/logging.hh"
SkewedAssoc::SkewedAssoc(const Params *p)
@@ -51,6 +52,10 @@ SkewedAssoc::SkewedAssoc(const Params *p)
// skewing functions accordingly to make good use of the hashing function
panic_if(setShift + 2 * (msbShift + 1) > 64, "Unsuported number of bits " \
"for the skewing functions.");
+
+ // We must have more than two sets, otherwise the MSB and LSB are the same
+ // bit, and the xor of them will always be 0
+ fatal_if(numSets <= 2, "The number of sets must be greater than 2");
}
Addr
diff --git a/src/mem/cache/tags/skewed_assoc.hh b/src/mem/cache/tags/skewed_assoc.hh
index 7f5a75266..9fc39e297 100644
--- a/src/mem/cache/tags/skewed_assoc.hh
+++ b/src/mem/cache/tags/skewed_assoc.hh
@@ -73,6 +73,9 @@ class SkewedAssoc : public BaseSetAssoc
* applies an XOR to the MSB and LSB, shifts all bits one bit to the right,
* and set the result of the XOR as the new MSB.
*
+ * This function is not bijective if the address has only 1 bit, as the MSB
+ * and LSB will be the same, and therefore the xor will always be 0.
+ *
* @param addr The address to be hashed.
* @param The hashed address.
*/