diff options
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 3edbe4761..e31532d48 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -1062,6 +1062,9 @@ LSQUnit<Impl>::updateVisibleState() inst->readyToExpose(false); } else { DPRINTF(LSQUnit, "load inst [sn:%lli] %s is an unsafe speculated load, but source registers are not tainted.\n", inst->seqNum, inst->pcState()); + if (!inst->readyToExpose() && inst->needPostFetch()) { + ++loadsToVLD; + } inst->readyToExpose(true); } } @@ -1086,6 +1089,8 @@ LSQUnit<Impl>::exposeLoads() int old_loadsToVLD = loadsToVLD; + DPRINTF(LSQUnit, "starting exposeLoads(): loadsToVLD = %d\n", loadsToVLD); + // [InvisiSpec] Note: // need to iterate from the head every time // since the load can be exposed out-of-order |