diff options
-rw-r--r-- | src/arch/arm/ArmSystem.py | 2 | ||||
-rw-r--r-- | src/arch/arm/isa.cc | 10 | ||||
-rw-r--r-- | src/arch/arm/isa.hh | 1 | ||||
-rw-r--r-- | src/arch/arm/system.cc | 1 | ||||
-rw-r--r-- | src/arch/arm/system.hh | 10 |
5 files changed, 24 insertions, 0 deletions
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py index 1e3a8cfca..cd08d7449 100644 --- a/src/arch/arm/ArmSystem.py +++ b/src/arch/arm/ArmSystem.py @@ -65,6 +65,8 @@ class ArmSystem(System): "True if Security Extensions are implemented") have_virtualization = Param.Bool(False, "True if Virtualization Extensions are implemented") + have_crypto = Param.Bool(False, + "True if Crypto Extensions is implemented") have_lpae = Param.Bool(True, "True if LPAE is implemented") highest_el_is_64 = Param.Bool(False, "True if the register width of the highest implemented exception level " diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index 878ff70d7..22d275d52 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -82,12 +82,14 @@ ISA::ISA(Params *p) highestELIs64 = system->highestELIs64(); haveSecurity = system->haveSecurity(); haveLPAE = system->haveLPAE(); + haveCrypto = system->haveCrypto(); haveVirtualization = system->haveVirtualization(); haveLargeAsid64 = system->haveLargeAsid64(); physAddrRange = system->physAddrRange(); } else { highestELIs64 = true; // ArmSystem::highestELIs64 does the same haveSecurity = haveLPAE = haveVirtualization = false; + haveCrypto = false; haveLargeAsid64 = false; physAddrRange = 32; // dummy value } @@ -122,6 +124,10 @@ ISA::clear() // AArch32 or AArch64 initID64(p); + miscRegs[MISCREG_ID_ISAR5] = insertBits( + miscRegs[MISCREG_ID_ISAR5], 19, 4, + haveCrypto ? 0x1112 : 0x0); + if (FullSystem && system->highestELIs64()) { // Initialize AArch64 state clear64(p); @@ -344,6 +350,10 @@ ISA::initID64(const ArmISAParams *p) miscRegs[MISCREG_ID_AA64MMFR0_EL1] = insertBits( miscRegs[MISCREG_ID_AA64MMFR0_EL1], 3, 0, encodePhysAddrRange64(physAddrRange)); + // Crypto + miscRegs[MISCREG_ID_AA64ISAR0_EL1] = insertBits( + miscRegs[MISCREG_ID_AA64ISAR0_EL1], 19, 4, + haveCrypto ? 0x1112 : 0x0); } void diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index ae35d704c..885190c68 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -87,6 +87,7 @@ namespace ArmISA bool haveSecurity; bool haveLPAE; bool haveVirtualization; + bool haveCrypto; bool haveLargeAsid64; uint8_t physAddrRange; diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc index a540a63c4..21b02e968 100644 --- a/src/arch/arm/system.cc +++ b/src/arch/arm/system.cc @@ -61,6 +61,7 @@ ArmSystem::ArmSystem(Params *p) _haveSecurity(p->have_security), _haveLPAE(p->have_lpae), _haveVirtualization(p->have_virtualization), + _haveCrypto(p->have_crypto), _genericTimer(nullptr), _highestELIs64(p->highest_el_is_64), _resetAddr64(p->auto_reset_addr_64 ? diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh index e7696a4fd..2e236f722 100644 --- a/src/arch/arm/system.hh +++ b/src/arch/arm/system.hh @@ -89,6 +89,11 @@ class ArmSystem : public System const bool _haveVirtualization; /** + * True if this system implements the Crypto Extension + */ + const bool _haveCrypto; + + /** * Pointer to the Generic Timer wrapper. */ GenericTimer *_genericTimer; @@ -177,6 +182,11 @@ class ArmSystem : public System */ bool haveVirtualization() const { return _haveVirtualization; } + /** Returns true if this system implements the Crypto + * Extension + */ + bool haveCrypto() const { return _haveCrypto; } + /** Sets the pointer to the Generic Timer. */ void setGenericTimer(GenericTimer *generic_timer) { |