diff options
-rw-r--r-- | arch/alpha/ev5.cc | 10 | ||||
-rw-r--r-- | arch/alpha/isa_desc | 17 | ||||
-rw-r--r-- | arch/alpha/pseudo_inst.cc | 19 | ||||
-rw-r--r-- | arch/alpha/pseudo_inst.hh | 3 | ||||
-rw-r--r-- | arch/alpha/vptr.hh | 113 | ||||
-rw-r--r-- | base/statistics.hh | 218 | ||||
-rw-r--r-- | cpu/base_cpu.cc | 7 | ||||
-rw-r--r-- | cpu/base_cpu.hh | 20 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.cc | 7 | ||||
-rw-r--r-- | cpu/simple_cpu/simple_cpu.hh | 7 | ||||
-rw-r--r-- | kern/tru64/mbuf.hh | 4 | ||||
-rw-r--r-- | sim/debug.cc | 2 | ||||
-rw-r--r-- | sim/debug.hh | 4 | ||||
-rw-r--r-- | sim/stat_control.cc | 26 | ||||
-rw-r--r-- | sim/stats.hh | 6 | ||||
-rw-r--r-- | test/Makefile | 12 | ||||
-rw-r--r-- | test/stattest.cc | 10 |
17 files changed, 334 insertions, 151 deletions
diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 9b3ac5fff..f037a34ac 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -1,7 +1,6 @@ /* $Id$ */ #include "targetarch/alpha_memory.hh" -#include "sim/annotation.hh" #ifdef DEBUG #include "sim/debug.hh" #endif @@ -126,8 +125,6 @@ ExecContext::ev5_trap(Fault fault) regs.pc = ipr[AlphaISA::IPR_PAL_BASE] + AlphaISA::fault_addr[fault]; regs.npc = regs.pc + sizeof(MachInst); - - Annotate::Ev5Trap(this, fault); } @@ -303,6 +300,7 @@ Fault ExecContext::setIpr(int idx, uint64_t val) { uint64_t *ipr = regs.ipr; + uint64_t old; if (misspeculating()) return No_Fault; @@ -355,9 +353,9 @@ ExecContext::setIpr(int idx, uint64_t val) case AlphaISA::IPR_PALtemp23: // write entire quad w/ no side-effect + old = ipr[idx]; ipr[idx] = val; - kernelStats.context(ipr[idx]); - Annotate::Context(this); + kernelStats.context(old, val); break; case AlphaISA::IPR_DTB_PTE: @@ -385,11 +383,9 @@ ExecContext::setIpr(int idx, uint64_t val) // only write least significant five bits - interrupt level ipr[idx] = val & 0x1f; kernelStats.swpipl(ipr[idx]); - Annotate::IPL(this, val & 0x1f); break; case AlphaISA::IPR_DTB_CM: - Annotate::ChangeMode(this, (val & 0x18) != 0); kernelStats.mode((val & 0x18) != 0); case AlphaISA::IPR_ICM: diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 0d1e7138f..9bbdac9b4 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -25,7 +25,6 @@ let {{ #include "cpu/full_cpu/dyn_inst.hh" #include "cpu/simple_cpu/simple_cpu.hh" #include "cpu/static_inst.hh" -#include "sim/annotation.hh" #include "sim/sim_exit.hh" #ifdef FULL_SYSTEM @@ -2297,8 +2296,6 @@ decode OPCODE default Unknown::unknown() { // on this PAL call (including maybe suppress it) dopal = xc->simPalCheck(palFunc); - Annotate::Callpal(xc->xcBase(), palFunc); - if (dopal) { AlphaISA::swap_palshadow(&xc->xcBase()->regs, true); xc->setIpr(AlphaISA::IPR_EXC_ADDR, NPC); @@ -2357,24 +2354,20 @@ decode OPCODE default Unknown::unknown() { // M5 special opcodes use the reserved 0x01 opcode space 0x01: decode M5FUNC { 0x00: arm({{ - if (!xc->misspeculating()) { - Annotate::ARM(xc->xcBase()); - xc->xcBase()->kernelStats.arm(); - } + if (!xc->misspeculating()) + AlphaPseudo::arm(xc->xcBase()); }}); 0x01: quiesce({{ if (!xc->misspeculating()) AlphaPseudo::quiesce(xc->xcBase()); }}); 0x10: ivlb({{ - if (!xc->misspeculating()) { - Annotate::BeginInterval(xc->xcBase()); - xc->xcBase()->kernelStats.ivlb(); - } + if (!xc->misspeculating()) + AlphaPseudo::ivlb(xc->xcBase()); }}, No_OpClass); 0x11: ivle({{ if (!xc->misspeculating()) - Annotate::EndInterval(xc->xcBase()); + AlphaPseudo::ivle(xc->xcBase()); }}, No_OpClass); 0x20: m5exit_old({{ if (!xc->misspeculating()) diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index 194dc6400..0a5c5b006 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -30,7 +30,6 @@ #include "arch/alpha/pseudo_inst.hh" #include "cpu/exec_context.hh" -#include "sim/annotation.hh" #include "sim/param.hh" #include "sim/serialize.hh" #include "sim/sim_exit.hh" @@ -47,17 +46,33 @@ namespace AlphaPseudo bool doQuiesce; void + arm(ExecContext *xc) + { + xc->kernelStats.arm(); + } + + void quiesce(ExecContext *xc) { if (!doQuiesce) return; - Annotate::QUIESCE(xc); xc->suspend(); xc->kernelStats.quiesce(); } void + ivlb(ExecContext *xc) + { + xc->kernelStats.ivlb(); + } + + void + ivle(ExecContext *xc) + { + } + + void m5exit_old(ExecContext *xc) { SimExit(curTick, "m5_exit_old instruction encountered"); diff --git a/arch/alpha/pseudo_inst.hh b/arch/alpha/pseudo_inst.hh index 85f432504..e5551a44b 100644 --- a/arch/alpha/pseudo_inst.hh +++ b/arch/alpha/pseudo_inst.hh @@ -37,7 +37,10 @@ namespace AlphaPseudo extern bool doCheckpointInsts; extern bool doQuiesce; + void arm(ExecContext *xc); void quiesce(ExecContext *xc); + void ivlb(ExecContext *xc); + void ivle(ExecContext *xc); void m5exit(ExecContext *xc); void m5exit_old(ExecContext *xc); void resetstats(ExecContext *xc); diff --git a/arch/alpha/vptr.hh b/arch/alpha/vptr.hh new file mode 100644 index 000000000..7f0b036a3 --- /dev/null +++ b/arch/alpha/vptr.hh @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __VPTR_HH__ +#define __VPTR_HH__ + +#include "arch/alpha/vtophys.hh" + +class ExecContext; + +template <class T> +class VPtr +{ + public: + typedef T Type; + + private: + ExecContext *xc; + Addr ptr; + + public: + ExecContext *GetXC() const { return xc; } + Addr GetPointer() const { return ptr; } + + public: + explicit VPtr(ExecContext *_xc, Addr p = 0) : xc(_xc), ptr(p) { } + template <class U> + VPtr(const VPtr<U> &vp) : xc(vp.GetXC()), ptr(vp.GetPointer()) {} + ~VPtr() {} + + bool operator!() const + { + return ptr == 0; + } + + VPtr<T> operator+(int offset) + { + VPtr<T> ptr(*this); + ptr += offset; + + return ptr; + } + + const VPtr<T> &operator+=(int offset) + { + ptr += offset; + assert((ptr & (ALPHA_PGBYTES - 1)) + sizeof(T) < ALPHA_PGBYTES); + + return *this; + } + + const VPtr<T> &operator=(Addr p) + { + assert((p & (ALPHA_PGBYTES - 1)) + sizeof(T) < ALPHA_PGBYTES); + ptr = p; + + return *this; + } + + template <class U> + const VPtr<T> &operator=(const VPtr<U> &vp) + { + xc = vp.GetXC(); + ptr = vp.GetPointer(); + + return *this; + } + + operator T *() + { + void *addr = vtomem(xc, ptr, sizeof(T)); + return (T *)addr; + } + + T *operator->() + { + void *addr = vtomem(xc, ptr, sizeof(T)); + return (T *)addr; + } + + T &operator*() + { + void *addr = vtomem(xc, ptr, sizeof(T)); + return *(T *)addr; + } +}; + +#endif // __VPTR_HH__ diff --git a/base/statistics.hh b/base/statistics.hh index e7fc18d74..ee09cc622 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -139,11 +139,13 @@ struct StatData static bool less(StatData *stat1, StatData *stat2); }; -struct ScalarData : public StatData +class ScalarData : public StatData { + public: virtual Counter value() const = 0; virtual Result result() const = 0; virtual Result total() const = 0; + virtual void visit(Visit &visitor) { visitor.visit(*this); } }; template <class Stat> @@ -162,8 +164,6 @@ class ScalarStatData : public ScalarData virtual Result total() const { return s.total(); } virtual void reset() { s.reset(); } virtual bool zero() const { return s.zero(); } - - virtual void visit(Visit &visitor) { visitor.visit(*this); } }; struct VectorData : public StatData @@ -394,6 +394,16 @@ class Wrap : public Child return ptr; } + protected: + /** + * Copy constructor, copies are not allowed. + */ + Wrap(const Wrap &stat); + /** + * Can't copy stats. + */ + void operator=(const Wrap &); + public: Wrap() { @@ -726,16 +736,6 @@ class ScalarBase : public DataAccess return _bin->data(*_params); } - protected: - /** - * Copy constructor, copies are not allowed. - */ - ScalarBase(const ScalarBase &stat); - /** - * Can't copy stats. - */ - const ScalarBase &operator=(const ScalarBase &); - public: /** * Return the current value of this stat as its base type. @@ -822,6 +822,79 @@ class ScalarBase : public DataAccess }; +class ProxyData : public ScalarData +{ + public: + virtual void visit(Visit &visitor) { visitor.visit(*this); } + virtual bool binned() const { return false; } + virtual std::string str() const { return to_string(value()); } + virtual size_t size() const { return 1; } + virtual bool zero() const { return value() == 0; } + virtual bool check() const { return true; } + virtual void reset() { } +}; + +template <class T> +class ValueProxy : public ProxyData +{ + private: + T *scalar; + + public: + ValueProxy(T &val) : scalar(&val) {} + virtual Counter value() const { return *scalar; } + virtual Result result() const { return *scalar; } + virtual Result total() const { return *scalar; } +}; + +template <class T> +class FunctorProxy : public ProxyData +{ + private: + T *functor; + + public: + FunctorProxy(T &func) : functor(&func) {} + virtual Counter value() const { return (*functor)(); } + virtual Result result() const { return (*functor)(); } + virtual Result total() const { return (*functor)(); } +}; + +class ValueBase : public DataAccess +{ + private: + ProxyData *proxy; + + public: + ValueBase() : proxy(NULL) { } + ~ValueBase() { if (proxy) delete proxy; } + + template <class T> + void scalar(T &value) + { + proxy = new ValueProxy<T>(value); + setInit(); + } + + template <class T> + void functor(T &func) + { + proxy = new FunctorProxy<T>(func); + setInit(); + } + + Counter value() { return proxy->value(); } + Result result() const { return proxy->result(); } + Result total() const { return proxy->total(); }; + size_t size() const { return proxy->size(); } + + bool binned() const { return proxy->binned(); } + std::string str() const { return proxy->str(); } + bool zero() const { return proxy->zero(); } + bool check() const { return proxy != NULL; } + void reset() { } +}; + ////////////////////////////////////////////////////////////////////// // // Vector Statistics @@ -869,13 +942,6 @@ class VectorBase : public DataAccess return _bin->data(index, *_params); } - protected: - // Copying stats is not allowed - /** Copying stats isn't allowed. */ - VectorBase(const VectorBase &stat); - /** Copying stats isn't allowed. */ - const VectorBase &operator=(const VectorBase &); - public: void value(VCounter &vec) const { @@ -1127,11 +1193,6 @@ class Vector2dBase : public DataAccess return _bin->data(index, *_params); } - protected: - // Copying stats is not allowed - Vector2dBase(const Vector2dBase &stat); - const Vector2dBase &operator=(const Vector2dBase &); - public: Vector2dBase() {} @@ -1586,13 +1647,6 @@ class DistBase : public DataAccess return _bin->data(*_params); } - protected: - // Copying stats is not allowed - /** Copies are not allowed. */ - DistBase(const DistBase &stat); - /** Copies are not allowed. */ - const DistBase &operator=(const DistBase &); - public: DistBase() { } @@ -1659,11 +1713,6 @@ class VectorDistBase : public DataAccess return _bin->data(index, *_params); } - protected: - // Copying stats is not allowed - VectorDistBase(const VectorDistBase &stat); - const VectorDistBase &operator=(const VectorDistBase &); - public: VectorDistBase() {} @@ -1910,56 +1959,6 @@ class ConstNode : public Node virtual std::string str() const { return to_string(vresult[0]); } }; -template <class T> -class FunctorNode : public Node -{ - private: - T &functor; - mutable VResult vresult; - - public: - FunctorNode(T &f) : functor(f) { vresult.resize(1); } - const VResult &result() const - { - vresult[0] = (Result)functor(); - return vresult; - } - virtual Result total() const { return (Result)functor(); }; - - virtual size_t size() const { return 1; } - /** - * Return true if stat is binned. - *@return False since Functors aren't binned - */ - virtual bool binned() const { return false; } - virtual std::string str() const { return to_string(functor()); } -}; - -template <class T> -class ScalarNode : public Node -{ - private: - T &scalar; - mutable VResult vresult; - - public: - ScalarNode(T &s) : scalar(s) { vresult.resize(1); } - const VResult &result() const - { - vresult[0] = (Result)scalar; - return vresult; - } - virtual Result total() const { return (Result)scalar; }; - - virtual size_t size() const { return 1; } - /** - * Return true if stat is binned. - *@return False since Scalar's aren't binned - */ - virtual bool binned() const { return false; } - virtual std::string str() const { return to_string(scalar); } -}; - template <class Op> struct OpString; @@ -2219,6 +2218,30 @@ class Scalar void operator=(const U &v) { Base::operator=(v); } }; +class Value + : public Wrap<Value, + ValueBase, + ScalarStatData> +{ + public: + /** The base implementation. */ + typedef ValueBase Base; + + template <class T> + Value &scalar(T &value) + { + Base::scalar(value); + return *this; + } + + template <class T> + Value &functor(T &func) + { + Base::functor(func); + return *this; + } +}; + /** * A stat that calculates the per cycle average of a value. * @sa Stat, ScalarBase, AvgStor @@ -2698,6 +2721,13 @@ class Temp * Create a new ScalarStatNode. * @param s The ScalarStat to place in a node. */ + Temp(const Value &s) + : node(new ScalarStatNode(s.statData())) { } + + /** + * Create a new ScalarStatNode. + * @param s The ScalarStat to place in a node. + */ template <class Bin> Temp(const Average<Bin> &s) : node(new ScalarStatNode(s.statData())) { } @@ -2861,20 +2891,6 @@ constant(T val) return NodePtr(new ConstNode<T>(val)); } -template <typename T> -inline Temp -functor(T &val) -{ - return NodePtr(new FunctorNode<T>(val)); -} - -template <typename T> -inline Temp -scalar(T &val) -{ - return NodePtr(new ScalarNode<T>(val)); -} - inline Temp sum(Temp val) { diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index e00de8389..624023f0a 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -130,6 +130,13 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, void BaseCPU::regStats() { + using namespace Statistics; + + numCycles + .name(name() + ".numCycles") + .desc("number of cpu cycles simulated") + ; + int size = execContexts.size(); if (size > 1) { for (int i = 0; i < size; ++i) { diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh index 648035732..c4826cf15 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base_cpu.hh @@ -31,10 +31,10 @@ #include <vector> +#include "base/statistics.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" - -#include "targetarch/isa_traits.hh" // for Addr +#include "targetarch/isa_traits.hh" #ifdef FULL_SYSTEM class System; @@ -147,11 +147,27 @@ class BaseCPU : public SimObject */ virtual BranchPred *getBranchPred() { return NULL; }; + virtual Counter totalInstructions() const { return 0; } + private: static std::vector<BaseCPU *> cpuList; //!< Static global cpu list public: static int numSimulatedCPUs() { return cpuList.size(); } + static Counter numSimulatedInstructions() + { + Counter total = 0; + + int size = cpuList.size(); + for (int i = 0; i < size; ++i) + total += cpuList[i]->totalInstructions(); + + return total; + } + + public: + // Number of CPU cycles simulated + Statistics::Scalar<> numCycles; }; #endif // __BASE_CPU_HH__ diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 065140883..617c91e68 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -50,7 +50,6 @@ #include "cpu/static_inst.hh" #include "mem/base_mem.hh" #include "mem/mem_interface.hh" -#include "sim/annotation.hh" #include "sim/builder.hh" #include "sim/debug.hh" #include "sim/host.hh" @@ -287,8 +286,6 @@ SimpleCPU::regStats() ; idleFraction = constant(1.0) - notIdleFraction; - numInsts = Statistics::scalar(numInst) - Statistics::scalar(startNumInst); - simInsts += numInsts; } void @@ -581,7 +578,6 @@ SimpleCPU::post_interrupt(int int_num, int index) if (xc->status() == ExecContext::Suspended) { DPRINTF(IPI,"Suspended Processor awoke\n"); xc->activate(); - Annotate::Resume(xc); } } #endif // FULL_SYSTEM @@ -590,6 +586,8 @@ SimpleCPU::post_interrupt(int int_num, int index) void SimpleCPU::tick() { + numCycles++; + traceData = NULL; Fault fault = No_Fault; @@ -697,6 +695,7 @@ SimpleCPU::tick() // keep an instruction count numInst++; + numInsts++; // check for instruction-count-based events comInstEventQueue[0]->serviceEvents(numInst); diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 4977e6992..07d6cb0c9 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -204,7 +204,12 @@ class SimpleCPU : public BaseCPU // number of simulated instructions Counter numInst; Counter startNumInst; - Statistics::Formula numInsts; + Statistics::Scalar<> numInsts; + + virtual Counter totalInstructions() const + { + return numInst - startNumInst; + } // number of simulated memory references Statistics::Scalar<> numMemRefs; diff --git a/kern/tru64/mbuf.hh b/kern/tru64/mbuf.hh index bfee0b3fa..a386fa611 100644 --- a/kern/tru64/mbuf.hh +++ b/kern/tru64/mbuf.hh @@ -32,6 +32,8 @@ #include "sim/host.hh" #include "targetarch/isa_traits.hh" +namespace tru64 { + struct m_hdr { Addr mh_next; // 0x00 Addr mh_nextpkt; // 0x08 @@ -91,4 +93,6 @@ struct mbuf { #define m_pktdat M_dat.MH.MH_dat.MH_databuf #define m_dat M_dat.M_databuf +} + #endif // __MBUF_HH__ diff --git a/sim/debug.cc b/sim/debug.cc index 09c604a95..b73ab4245 100644 --- a/sim/debug.cc +++ b/sim/debug.cc @@ -40,11 +40,13 @@ using namespace std; +#ifdef DEBUG void debug_break() { kill(getpid(), SIGTRAP); } +#endif // // Debug event: place a breakpoint on the process function and diff --git a/sim/debug.hh b/sim/debug.hh index eb0be772e..a4f8b8702 100644 --- a/sim/debug.hh +++ b/sim/debug.hh @@ -29,6 +29,10 @@ #ifndef __DEBUG_HH__ #define __DEBUG_HH__ +#ifdef DEBUG void debug_break(); +#else +inline void debug_break() { } +#endif #endif // __DEBUG_HH__ diff --git a/sim/stat_control.cc b/sim/stat_control.cc index d6d7e2c91..c7d2fdd5b 100644 --- a/sim/stat_control.cc +++ b/sim/stat_control.cc @@ -39,6 +39,7 @@ #include "base/str.hh" #include "base/time.hh" #include "base/stats/output.hh" +#include "cpu/base_cpu.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" #include "sim/stat_control.hh" @@ -47,13 +48,14 @@ using namespace std; Statistics::Formula hostInstRate; -Statistics::Formula hostMemory; -Statistics::Formula hostSeconds; Statistics::Formula hostTickRate; +Statistics::Value hostMemory; +Statistics::Value hostSeconds; -Statistics::Formula simInsts; +Statistics::Value simTicks; +Statistics::Value simInsts; +Statistics::Value simFreq; Statistics::Formula simSeconds; -Statistics::Formula simTicks; namespace Statistics { @@ -84,6 +86,7 @@ void InitSimStats() { simInsts + .functor(BaseCPU::numSimulatedInstructions) .name("sim_insts") .desc("Number of instructions simulated") .precision(0) @@ -95,7 +98,14 @@ InitSimStats() .desc("Number of seconds simulated") ; + simFreq + .scalar(ticksPerSecond) + .name("sim_freq") + .desc("Frequency of simulated ticks") + ; + simTicks + .scalar(curTick) .name("sim_ticks") .desc("Number of ticks simulated") ; @@ -108,12 +118,14 @@ InitSimStats() ; hostMemory + .functor(memUsage) .name("host_mem_usage") .desc("Number of bytes of host memory used") .prereq(hostMemory) ; hostSeconds + .functor(statElapsedTime) .name("host_seconds") .desc("Real time elapsed on the host") .precision(2) @@ -125,11 +137,7 @@ InitSimStats() .precision(0) ; - simInsts = constant(0); - simTicks = scalar(curTick) - scalar(startTick); - simSeconds = simTicks / scalar(ticksPerSecond); - hostMemory = functor(memUsage); - hostSeconds = functor(statElapsedTime); + simSeconds = simTicks / simFreq; hostInstRate = simInsts / hostSeconds; hostTickRate = simTicks / hostSeconds; diff --git a/sim/stats.hh b/sim/stats.hh index b736850e7..c5e791cfb 100644 --- a/sim/stats.hh +++ b/sim/stats.hh @@ -31,11 +31,7 @@ #include "base/statistics.hh" -extern Statistics::Formula simTicks; extern Statistics::Formula simSeconds; -extern Statistics::Formula simInsts; -extern Statistics::Formula hostSeconds; -extern Statistics::Formula hostTickRate; -extern Statistics::Formula hostInstRate; +extern Statistics::Value simTicks; #endif // __SIM_SIM_STATS_HH__ diff --git a/test/Makefile b/test/Makefile index bf4200ba3..15019a1f5 100644 --- a/test/Makefile +++ b/test/Makefile @@ -2,18 +2,24 @@ CC?= gcc CXX?= g++ +PYTHON?=/usr/bin/env python CURDIR?= $(shell /bin/pwd) -SRCDIR?= .. +SRCDIR?= $(CURDIR)/.. CCFLAGS= -g -O0 -MMD -I. -I$(SRCDIR) -I- -DTRACING_ON=0 MYSQL= -I/usr/include/mysql -L/usr/lib/mysql -lmysqlclient -VPATH=$(SRCDIR) +VPATH=$(SRCDIR):$(CURDIR) default: @echo "You must specify a target" +base/traceflags.cc base/traceflags.hh: $(SRCDIR)/base/traceflags.py + mkdir -p base; \ + cd base; \ + $(PYTHON) $< + bitvectest: test/bitvectest.cc $(CXX) $(CCFLAGS) -o $@ $^ @@ -61,5 +67,5 @@ tracetest: $(TRACE) $(CXX) $(CCFLAGS) -o $@ $^ clean: - @rm -f *test *~ .#* *.core core + @rm -rf *test *~ .#* *.core core base .PHONY: clean diff --git a/test/stattest.cc b/test/stattest.cc index 7bf355c0e..9b7ba9857 100644 --- a/test/stattest.cc +++ b/test/stattest.cc @@ -66,8 +66,8 @@ Vector2d<> s16; Formula f1; Formula f2; Formula f3; -Formula f4; -Formula f5; +Value f4; +Value f5; Formula f6; Formula f7; @@ -279,11 +279,14 @@ main(int argc, char *argv[]) ; f4 + .functor(testfunc) .name("Formula4") .desc("this is formula 4") ; + TestClass testclass; f5 + .functor(testclass) .name("Formula5") .desc("this is formula 5") ; @@ -296,9 +299,6 @@ main(int argc, char *argv[]) f1 = s1 + s2; f2 = (-s1) / (-s2) * (-s3 + ULL(100) + s4); f3 = sum(s5) * s7; - f4 = functor(testfunc); - TestClass testclass; - f5 = functor(testclass); f6 += constant(10.0); f6 += s5[3]; f7 = constant(1); |