diff options
| -rw-r--r-- | src/arch/mips/tlb.hh | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/arch/mips/tlb.hh b/src/arch/mips/tlb.hh index 5240eb2a9..0dfe3ecf1 100644 --- a/src/arch/mips/tlb.hh +++ b/src/arch/mips/tlb.hh @@ -53,7 +53,6 @@ class ThreadContext; namespace MipsISA { // WARN: This particular TLB entry is not necessarily conformed to MIPS ISA -// We just need this to make compiler happy. Use "PTE" type for real entry. struct TlbEntry { Addr _pageStart; |