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-rw-r--r--src/arch/alpha/SConscript1
-rw-r--r--src/arch/alpha/isa/main.isa2
-rw-r--r--src/arch/alpha/isa_traits.hh15
-rw-r--r--src/arch/alpha/regfile.cc15
-rw-r--r--src/arch/alpha/regfile.hh25
-rw-r--r--src/arch/alpha/regredir.hh43
-rw-r--r--src/arch/alpha/remote_gdb.cc1
-rw-r--r--src/arch/alpha/utility.hh2
8 files changed, 65 insertions, 39 deletions
diff --git a/src/arch/alpha/SConscript b/src/arch/alpha/SConscript
index f7159e4fb..2780af104 100644
--- a/src/arch/alpha/SConscript
+++ b/src/arch/alpha/SConscript
@@ -39,6 +39,7 @@ if env['TARGET_ISA'] == 'alpha':
Source('miscregfile.cc')
Source('pagetable.cc')
Source('regfile.cc')
+ Source('regredir.cc')
Source('remote_gdb.cc')
Source('tlb.cc')
Source('utility.cc')
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index d2b37590a..2be325a08 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -56,6 +56,7 @@ output decoder {{
#include <cmath>
#include "arch/alpha/miscregfile.hh"
+#include "arch/alpha/regredir.hh"
#include "base/cprintf.hh"
#include "base/fenv.hh"
#include "base/loader/symtab.hh"
@@ -69,6 +70,7 @@ using namespace AlphaISA;
output exec {{
#include <math.h>
+#include "arch/alpha/regredir.hh"
#include "base/cp_annotate.hh"
#include "sim/pseudo_inst.hh"
#include "arch/alpha/ipr.hh"
diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index c8d6f33f9..8157ef7ec 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -128,21 +128,6 @@ enum mode_type
// Constants Related to the number of registers
enum {
- NumIntArchRegs = 32,
- NumPALShadowRegs = 8,
- NumFloatArchRegs = 32,
- // @todo: Figure out what this number really should be.
- NumMiscArchRegs = 77,
-
- NumIntRegs = NumIntArchRegs + NumPALShadowRegs,
- NumFloatRegs = NumFloatArchRegs,
- NumMiscRegs = NumMiscArchRegs,
-
- TotalNumRegs =
- NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs,
-
- TotalDataRegs = NumIntRegs + NumFloatRegs,
-
// semantically meaningful register indices
ZeroReg = 31, // architecturally meaningful
// the rest of these depend on the ABI
diff --git a/src/arch/alpha/regfile.cc b/src/arch/alpha/regfile.cc
index 8b226a9cf..0ddb9da8f 100644
--- a/src/arch/alpha/regfile.cc
+++ b/src/arch/alpha/regfile.cc
@@ -30,6 +30,7 @@
* Kevin Lim
*/
+#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/regfile.hh"
#include "arch/alpha/miscregfile.hh"
#include "cpu/thread_context.hh"
@@ -38,20 +39,6 @@ using namespace std;
namespace AlphaISA {
-#if FULL_SYSTEM
-const int reg_redir[NumIntRegs] = {
- /* 0 */ 0, 1, 2, 3, 4, 5, 6, 7,
- /* 8 */ 32, 33, 34, 35, 36, 37, 38, 15,
- /* 16 */ 16, 17, 18, 19, 20, 21, 22, 23,
- /* 24 */ 24, 39, 26, 27, 28, 29, 30, 31 };
-#else
-const int reg_redir[NumIntRegs] = {
- /* 0 */ 0, 1, 2, 3, 4, 5, 6, 7,
- /* 8 */ 8, 9, 10, 11, 12, 13, 14, 15,
- /* 16 */ 16, 17, 18, 19, 20, 21, 22, 23,
- /* 24 */ 24, 25, 26, 27, 28, 29, 30, 31 };
-#endif
-
void
copyRegs(ThreadContext *src, ThreadContext *dest)
{
diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh
index e7374036f..c5fa981a6 100644
--- a/src/arch/alpha/regfile.hh
+++ b/src/arch/alpha/regfile.hh
@@ -31,20 +31,27 @@
#ifndef __ARCH_ALPHA_REGFILE_HH__
#define __ARCH_ALPHA_REGFILE_HH__
-#include "arch/alpha/isa_traits.hh"
+#include "arch/alpha/ipr.hh"
-#include <string>
-
-//XXX These should be implemented by someone who knows the alpha stuff better
-
-class Checkpoint;
-class EventManager;
class ThreadContext;
namespace AlphaISA {
-// redirected register map, really only used for the full system case.
-extern const int reg_redir[NumIntRegs];
+ const int NumIntArchRegs = 32;
+ const int NumPALShadowRegs = 8;
+ const int NumFloatArchRegs = 32;
+ // @todo: Figure out what this number really should be.
+ const int NumMiscArchRegs = 77;
+
+ const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs;
+ const int NumFloatRegs = NumFloatArchRegs;
+ const int NumMiscRegs = NumMiscArchRegs;
+
+ const int TotalNumRegs =
+ NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs;
+
+ const int TotalDataRegs = NumIntRegs + NumFloatRegs;
+
void copyRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/arch/alpha/regredir.hh b/src/arch/alpha/regredir.hh
new file mode 100644
index 000000000..ac50ec482
--- /dev/null
+++ b/src/arch/alpha/regredir.hh
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2003-2009 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __ARCH_ALPHA_REGREDIR_HH__
+#define __ARCH_ALPHA_REGREDIR_HH__
+
+#include "arch/alpha/regfile.hh"
+
+namespace AlphaISA {
+
+// redirected register map, really only used for the full system case.
+extern const int reg_redir[NumIntRegs];
+
+} // namespace AlphaISA
+
+#endif // __ARCH_ALPHA_REGREDIR_HH__
diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc
index c47293b98..5391d2056 100644
--- a/src/arch/alpha/remote_gdb.cc
+++ b/src/arch/alpha/remote_gdb.cc
@@ -128,6 +128,7 @@
#include "arch/alpha/kgdb.h"
#include "arch/alpha/utility.hh"
+#include "arch/alpha/regredir.hh"
#include "arch/alpha/remote_gdb.hh"
#include "base/intmath.hh"
#include "base/remote_gdb.hh"
diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh
index f20025f18..71ee4aceb 100644
--- a/src/arch/alpha/utility.hh
+++ b/src/arch/alpha/utility.hh
@@ -34,7 +34,7 @@
#include "arch/alpha/types.hh"
#include "arch/alpha/isa_traits.hh"
-#include "arch/alpha/regfile.hh"
+#include "arch/alpha/miscregfile.hh"
#include "base/misc.hh"
#include "config/full_system.hh"
#include "cpu/thread_context.hh"
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 00:06:16 +0000