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-rw-r--r--src/arch/alpha/process.cc9
-rw-r--r--src/mem/page_table.cc10
-rw-r--r--src/mem/physical.cc8
-rw-r--r--src/sim/process.cc6
-rw-r--r--src/sim/serialize.cc15
-rw-r--r--src/sim/serialize.hh5
-rwxr-xr-xutil/checkpoint-aggregator.py2
7 files changed, 35 insertions, 20 deletions
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index 9d75d5fa1..1c83f64b2 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -175,21 +175,22 @@ AlphaLiveProcess::argsInit(int intSize, int pageSize)
void
AlphaLiveProcess::startup()
{
- if (checkpointRestored)
+ ThreadContext *tc = system->getThreadContext(contextIds[0]);
+ tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
+
+ if (checkpointRestored) {
return;
+ }
Process::startup();
argsInit(MachineBytes, VMPageSize);
- ThreadContext *tc = system->getThreadContext(contextIds[0]);
tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
//Operate in user mode
tc->setMiscRegNoEffect(IPR_ICM, 0x18);
//No super page mapping
tc->setMiscRegNoEffect(IPR_MCSR, 0);
- //Set this to 0 for now, but it should be unique for each process
- tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
}
AlphaISA::IntReg
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index 88cfdfeb7..bcaf5582a 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -223,15 +223,5 @@ PageTable::unserialize(Checkpoint *cp, const std::string &section)
pTable[vaddr] = *entry;
++i;
}
-
- process->M5_pid = pTable[vaddr].asn;
-
-#if THE_ISA == ALPHA_ISA
- // The IPR_DTB_ASN misc reg must be set in Alpha for the tlb to work
- // correctly
- int id = process->contextIds[0];
- ThreadContext *tc = process->system->getThreadContext(id);
- tc->setMiscRegNoEffect(IPR_DTB_ASN, process->M5_pid << 57);
-#endif
}
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 121a6e447..081fbb4cb 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -540,12 +540,8 @@ PhysicalMemory::unserialize(Checkpoint *cp, const string &section)
/* Only copy bytes that are non-zero, so we don't give the VM system hell */
while (curSize < params()->range.size()) {
bytesRead = gzread(compressedMem, tempPage, chunkSize);
- if (bytesRead != chunkSize &&
- bytesRead != params()->range.size() - curSize)
- fatal("Read failed on physical memory checkpoint file '%s'"
- " got %d bytes, expected %d or %d bytes\n",
- filename, bytesRead, chunkSize,
- params()->range.size() - curSize);
+ if (bytesRead == 0)
+ break;
assert(bytesRead % sizeof(long) == 0);
diff --git a/src/sim/process.cc b/src/sim/process.cc
index 343d2ad5a..957c3cc3e 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -507,6 +507,7 @@ Process::serialize(std::ostream &os)
nameOut(os, csprintf("%s.FdMap%d", name(), x));
fd_map[x].serialize(os);
}
+ SERIALIZE_SCALAR(M5_pid);
}
@@ -528,6 +529,11 @@ Process::unserialize(Checkpoint *cp, const std::string &section)
fd_map[x].unserialize(cp, csprintf("%s.FdMap%d", section, x));
}
fix_file_offsets();
+ UNSERIALIZE_OPT_SCALAR(M5_pid);
+ // The above returns a bool so that you could do something if you don't
+ // find the param in the checkpoint if you wanted to, like set a default
+ // but in this case we'll just stick with the instantianted value if not
+ // found.
checkpointRestored = true;
diff --git a/src/sim/serialize.cc b/src/sim/serialize.cc
index 1663d18bc..0e6d9b254 100644
--- a/src/sim/serialize.cc
+++ b/src/sim/serialize.cc
@@ -204,6 +204,18 @@ paramIn(Checkpoint *cp, const string &section, const string &name, T &param)
}
}
+template <class T>
+bool
+optParamIn(Checkpoint *cp, const string &section, const string &name, T &param)
+{
+ string str;
+ if (!cp->find(section, name, str) || !parseParam(str, param)) {
+ warn("optional parameter %s:%s not present\n", section, name);
+ return false;
+ } else {
+ return true;
+ }
+}
template <class T>
void
@@ -322,6 +334,9 @@ paramOut(ostream &os, const string &name, type const &param); \
template void \
paramIn(Checkpoint *cp, const string &section, \
const string &name, type & param); \
+template bool \
+optParamIn(Checkpoint *cp, const string &section, \
+ const string &name, type & param); \
template void \
arrayParamOut(ostream &os, const string &name, \
type const *param, unsigned size); \
diff --git a/src/sim/serialize.hh b/src/sim/serialize.hh
index 08240c0c0..cf1a672be 100644
--- a/src/sim/serialize.hh
+++ b/src/sim/serialize.hh
@@ -58,6 +58,10 @@ void paramIn(Checkpoint *cp, const std::string &section,
const std::string &name, T &param);
template <class T>
+bool optParamIn(Checkpoint *cp, const std::string &section,
+ const std::string &name, T &param);
+
+template <class T>
void arrayParamOut(std::ostream &os, const std::string &name,
const T *param, unsigned size);
@@ -85,6 +89,7 @@ objParamIn(Checkpoint *cp, const std::string &section,
#define SERIALIZE_SCALAR(scalar) paramOut(os, #scalar, scalar)
#define UNSERIALIZE_SCALAR(scalar) paramIn(cp, section, #scalar, scalar)
+#define UNSERIALIZE_OPT_SCALAR(scalar) optParamIn(cp, section, #scalar, scalar)
// ENUMs are like SCALARs, but we cast them to ints on the way out
#define SERIALIZE_ENUM(scalar) paramOut(os, #scalar, (int)scalar)
diff --git a/util/checkpoint-aggregator.py b/util/checkpoint-aggregator.py
index f3c5eb5be..c7581201d 100755
--- a/util/checkpoint-aggregator.py
+++ b/util/checkpoint-aggregator.py
@@ -50,6 +50,8 @@ def aggregate(options, args):
if re.compile("cpu").search(sec):
newsec = re.sub("cpu", "cpu" + str(i), sec)
merged.add_section(newsec)
+ if re.compile("workload$").search(sec):
+ merged.set(newsec, "M5_pid", i)
items = config.items(sec)
for item in items: