4 files changed, 11 insertions, 2 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 45077a838..1c0a56362 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -89,7 +89,7 @@ def makeSparcSystem(mem_mode, mdesc = None):
     self.bridge = Bridge()
     self.t1000 = T1000()
     self.t1000.attachIO(self.iobus)
-    self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
+    self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()), zero = True)
     self.bridge.side_a = self.iobus.port
     self.bridge.side_b = self.membus.port
     self.physmem.port = self.membus.port
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 9b8ae1fc4..6610e547d 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -65,6 +65,10 @@ PhysicalMemory::PhysicalMemory(Params *p)
         fatal("Could not mmap!\n");
     }
 
+    //If requested, initialize all the memory to 0
+    if(params()->zero)
+        memset(pmemAddr, 0, params()->addrRange.size());
+
     pagePtr = 0;
 }
 
@@ -432,6 +436,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
     Param<string> file;
     Param<Range<Addr> > range;
     Param<Tick> latency;
+    Param<bool> zero;
 
 END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
 
@@ -439,7 +444,8 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
 
     INIT_PARAM_DFLT(file, "memory mapped file", ""),
     INIT_PARAM(range, "Device Address Range"),
-    INIT_PARAM(latency, "Memory access latency")
+    INIT_PARAM(latency, "Memory access latency"),
+    INIT_PARAM(zero, "Zero initialize memory")
 
 END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
 
@@ -449,6 +455,7 @@ CREATE_SIM_OBJECT(PhysicalMemory)
     p->name = getInstanceName();
     p->addrRange = range;
     p->latency = latency;
+    p->zero = zero;
     return new PhysicalMemory(p);
 }
 
diff --git a/src/mem/physical.hh b/src/mem/physical.hh
index 045e61612..af88bcaa0 100644
--- a/src/mem/physical.hh
+++ b/src/mem/physical.hh
@@ -154,6 +154,7 @@ class PhysicalMemory : public MemObject
         std::string name;
         Range<Addr> addrRange;
         Tick latency;
+        bool zero;
     };
 
   protected:
diff --git a/src/python/m5/objects/PhysicalMemory.py b/src/python/m5/objects/PhysicalMemory.py
index 4e097543d..b8df6229e 100644
--- a/src/python/m5/objects/PhysicalMemory.py
+++ b/src/python/m5/objects/PhysicalMemory.py
@@ -9,6 +9,7 @@ class PhysicalMemory(MemObject):
     range = Param.AddrRange(AddrRange('128MB'), "Device Address")
     file = Param.String('', "memory mapped file")
     latency = Param.Latency(Parent.clock, "latency of an access")
+    zero = Param.Bool(False, "zero initialize memory")
 
 class DRAMMemory(PhysicalMemory):
     type = 'DRAMMemory'