diff options
-rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 3 | ||||
-rw-r--r-- | src/arch/arm/isa/insts/misc64.isa | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index b42c9f9dd..80ad6cdf4 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -1090,8 +1090,7 @@ let {{ dsbIop = InstObjParams("dsb", "Dsb", "ImmOp", {"code": dsbCode, "predicate_test": predicateTest}, - ['IsMemBarrier', 'IsSerializeAfter', - 'IsSquashAfter']) + ['IsMemBarrier', 'IsSerializeAfter']) header_output += ImmOpDeclare.subst(dsbIop) decoder_output += ImmOpConstructor.subst(dsbIop) exec_output += PredOpExecute.subst(dsbIop) diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa index ac9f0a960..58f08f51e 100644 --- a/src/arch/arm/isa/insts/misc64.isa +++ b/src/arch/arm/isa/insts/misc64.isa @@ -146,8 +146,7 @@ let {{ exec_output += BasicExecute.subst(isbIop) dsbIop = InstObjParams("dsb", "Dsb64", "ArmStaticInst", "", - ['IsMemBarrier', 'IsSerializeAfter', - 'IsSquashAfter']) + ['IsMemBarrier', 'IsSerializeAfter']) header_output += BasicDeclare.subst(dsbIop) decoder_output += BasicConstructor64.subst(dsbIop) exec_output += BasicExecute.subst(dsbIop) |