diff options
| -rw-r--r-- | src/mem/cache/base.cc | 3 | ||||
| -rw-r--r-- | src/mem/cache/base.hh | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc index d126906d0..476c086ed 100644 --- a/src/mem/cache/base.cc +++ b/src/mem/cache/base.cc @@ -77,7 +77,6 @@ BaseCache::BaseCache(const Params *p) blocked(0), noTargetMSHR(NULL), missCount(p->max_miss_count), - drainManager(NULL), addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()), system(p->system) { @@ -752,8 +751,6 @@ BaseCache::drain(DrainManager *dm) // Set status if (count != 0) { - drainManager = dm; - setDrainState(Drainable::Draining); DPRINTF(Drain, "Cache not drained\n"); return count; diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh index e8adacfa1..b9b42da78 100644 --- a/src/mem/cache/base.hh +++ b/src/mem/cache/base.hh @@ -287,9 +287,6 @@ class BaseCache : public MemObject /** The number of misses to trigger an exit event. */ Counter missCount; - /** The drain event. */ - DrainManager *drainManager; - /** * The address range to which the cache responds on the CPU side. * Normally this is all possible memory addresses. */ |