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-rw-r--r--src/cpu/memtest/memtest.cc10
-rw-r--r--src/mem/cache/cache_impl.hh10
2 files changed, 16 insertions, 4 deletions
diff --git a/src/cpu/memtest/memtest.cc b/src/cpu/memtest/memtest.cc
index 024cd7e41..cb643e5d9 100644
--- a/src/cpu/memtest/memtest.cc
+++ b/src/cpu/memtest/memtest.cc
@@ -72,8 +72,8 @@ void
MemTest::CpuPort::recvFunctional(Packet *pkt)
{
//Do nothing if we see one come through
- if (curTick != 0)//Supress warning durring initialization
- warn("Functional Writes not implemented in MemTester\n");
+// if (curTick != 0)//Supress warning durring initialization
+// warn("Functional Writes not implemented in MemTester\n");
//Need to find any response values that intersect and update
return;
}
@@ -345,8 +345,8 @@ MemTest::tick()
} else {
paddr = ((base) ? baseAddr1 : baseAddr2) + offset;
}
- //bool probe = (random() % 2 == 1) && !req->isUncacheable();
- bool probe = false;
+ bool probe = (random() % 2 == 1) && !(flags & UNCACHEABLE);
+ //bool probe = false;
paddr &= ~((1 << access_size) - 1);
req->setPhys(paddr, 1 << access_size, flags);
@@ -388,6 +388,7 @@ MemTest::tick()
if (probe) {
cachePort.sendFunctional(pkt);
+ pkt->makeAtomicResponse();
completeRequest(pkt);
} else {
// req->completionEvent = new MemCompleteEvent(req, result, this);
@@ -431,6 +432,7 @@ MemTest::tick()
if (probe) {
cachePort.sendFunctional(pkt);
+ pkt->makeAtomicResponse();
completeRequest(pkt);
} else {
// req->completionEvent = new MemCompleteEvent(req, NULL, this);
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index c4acc03e7..d8afcb009 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -593,6 +593,8 @@ Cache<TagStore,Buffering,Coherence>::probe(Packet * &pkt, bool update,
if (pkt->isWrite()) {
memcpy(pkt_data, write_data, data_size);
} else {
+ pkt->flags |= SATISFIED;
+ pkt->result = Packet::Success;
memcpy(write_data, pkt_data, data_size);
}
}
@@ -626,11 +628,19 @@ Cache<TagStore,Buffering,Coherence>::probe(Packet * &pkt, bool update,
if (pkt->isWrite()) {
memcpy(pkt_data, write_data, data_size);
} else {
+ pkt->flags |= SATISFIED;
+ pkt->result = Packet::Success;
memcpy(write_data, pkt_data, data_size);
}
}
}
+ if (pkt->isRead()
+ && pkt->result != Packet::Success
+ && otherSidePort == memSidePort) {
+ otherSidePort->sendFunctional(pkt);
+ assert(pkt->result == Packet::Success);
+ }
return 0;
} else if (!blk) {
// update the cache state and statistics