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-rw-r--r--src/arch/alpha/SConscript2
-rw-r--r--src/arch/alpha/linux/system.cc2
-rw-r--r--src/arch/alpha/utility.cc (renamed from src/arch/sparc/arguments.cc)54
-rw-r--r--src/arch/alpha/utility.hh2
-rw-r--r--src/arch/mips/utility.hh4
-rw-r--r--src/arch/sparc/SConscript2
-rw-r--r--src/arch/sparc/arguments.hh149
-rw-r--r--src/arch/sparc/utility.cc64
-rw-r--r--src/arch/sparc/utility.hh3
-rw-r--r--src/kern/linux/events.cc4
-rw-r--r--src/kern/linux/printk.cc4
-rw-r--r--src/kern/linux/printk.hh4
-rw-r--r--src/kern/tru64/dump_mbuf.cc2
-rw-r--r--src/kern/tru64/dump_mbuf.hh4
-rw-r--r--src/kern/tru64/printf.cc6
-rw-r--r--src/kern/tru64/printf.hh4
-rw-r--r--src/kern/tru64/tru64_events.cc6
-rw-r--r--src/sim/SConscript1
-rw-r--r--src/sim/arguments.cc (renamed from src/arch/alpha/arguments.cc)20
-rw-r--r--src/sim/arguments.hh (renamed from src/arch/alpha/arguments.hh)17
20 files changed, 130 insertions, 224 deletions
diff --git a/src/arch/alpha/SConscript b/src/arch/alpha/SConscript
index 2d59180c4..4f293e22f 100644
--- a/src/arch/alpha/SConscript
+++ b/src/arch/alpha/SConscript
@@ -38,12 +38,12 @@ if env['TARGET_ISA'] == 'alpha':
Source('miscregfile.cc')
Source('regfile.cc')
Source('remote_gdb.cc')
+ Source('utility.cc')
if env['FULL_SYSTEM']:
SimObject('AlphaSystem.py')
SimObject('AlphaTLB.py')
- Source('arguments.cc')
Source('ev5.cc')
Source('idle_event.cc')
Source('ipr.cc')
diff --git a/src/arch/alpha/linux/system.cc b/src/arch/alpha/linux/system.cc
index f93cdfbad..102598716 100644
--- a/src/arch/alpha/linux/system.cc
+++ b/src/arch/alpha/linux/system.cc
@@ -40,7 +40,6 @@
* up boot time.
*/
-#include "arch/arguments.hh"
#include "arch/vtophys.hh"
#include "arch/alpha/idle_event.hh"
#include "arch/alpha/linux/system.hh"
@@ -54,6 +53,7 @@
#include "kern/linux/events.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
+#include "sim/arguments.hh"
#include "sim/byteswap.hh"
using namespace std;
diff --git a/src/arch/sparc/arguments.cc b/src/arch/alpha/utility.cc
index 44adf4a15..f1864203b 100644
--- a/src/arch/sparc/arguments.cc
+++ b/src/arch/alpha/utility.cc
@@ -26,48 +26,40 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
+ * Ali Saidi
*/
-#include "arch/sparc/arguments.hh"
-#include "arch/sparc/vtophys.hh"
-#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
-
-using namespace SparcISA;
+#include "arch/alpha/utility.hh"
-Arguments::Data::~Data()
-{
- while (!data.empty()) {
- delete [] data.front();
- data.pop_front();
- }
-}
+#if FULL_SYSTEM
+#include "arch/alpha/vtophys.hh"
+#include "mem/vport.hh"
+#endif
-char *
-Arguments::Data::alloc(size_t size)
+namespace AlphaISA
{
- char *buf = new char[size];
- data.push_back(buf);
- return buf;
-}
-uint64_t
-Arguments::getArg(bool fp)
+uint64_t getArgument(ThreadContext *tc, int number, bool fp)
{
- //The caller uses %o0-%05 for the first 6 arguments even if their floating
- //point. Double precision floating point values take two registers/args.
- //Quads, structs, and unions are passed as pointers. All arguments beyond
- //the sixth are passed on the stack past the 16 word window save area,
- //space for the struct/union return pointer, and space reserved for the
- //first 6 arguments which the caller may use but doesn't have to.
- if (number < 6) {
- return tc->readIntReg(8 + number);
+#if FULL_SYSTEM
+ if (number < NumArgumentRegs) {
+ if (fp)
+ return tc->readFloatRegBits(ArgumentReg[number]);
+ else
+ return tc->readIntReg(ArgumentReg[number]);
} else {
- Addr sp = tc->readIntReg(14);
+ Addr sp = tc->readIntReg(StackPointerReg);
VirtualPort *vp = tc->getVirtPort(tc);
- uint64_t arg = vp->read<uint64_t>(sp + 92 + (number-6) * sizeof(uint64_t));
+ uint64_t arg = vp->read<uint64_t>(sp +
+ (number-NumArgumentRegs) * sizeof(uint64_t));
tc->delVirtPort(vp);
return arg;
}
+#else
+ panic("getArgument() is Full system only\n");
+ M5_DUMMY_RETURN
+#endif
}
+} // namespace AlphaISA
+
diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh
index c20394a92..5d461a0f9 100644
--- a/src/arch/alpha/utility.hh
+++ b/src/arch/alpha/utility.hh
@@ -42,6 +42,8 @@
namespace AlphaISA
{
+ uint64_t getArgument(ThreadContext *tc, int number, bool fp);
+
static inline bool
inUserMode(ThreadContext *tc)
{
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index e3fd9daa8..6195c4ceb 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -48,6 +48,10 @@ class ThreadContext;
namespace MipsISA {
+ uint64_t getArgument(ThreadContext *tc, bool fp) {
+ panic("getArgument() not implemented for MIPS\n");
+ }
+
//Floating Point Utility Functions
uint64_t fpConvert(ConvertType cvt_type, double fp_val);
double roundFP(double val, int digits);
diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript
index c9dbb8cf2..0552c282b 100644
--- a/src/arch/sparc/SConscript
+++ b/src/arch/sparc/SConscript
@@ -39,12 +39,12 @@ if env['TARGET_ISA'] == 'sparc':
Source('miscregfile.cc')
Source('regfile.cc')
Source('remote_gdb.cc')
+ Source('utility.cc')
if env['FULL_SYSTEM']:
SimObject('SparcSystem.py')
SimObject('SparcTLB.py')
- Source('arguments.cc')
Source('pagetable.cc')
Source('stacktrace.cc')
Source('system.cc')
diff --git a/src/arch/sparc/arguments.hh b/src/arch/sparc/arguments.hh
deleted file mode 100644
index 5596f7408..000000000
--- a/src/arch/sparc/arguments.hh
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- */
-
-#ifndef __ARCH_SPARC_ARGUMENTS_HH__
-#define __ARCH_SPARC_ARGUMENTS_HH__
-
-#include <assert.h>
-
-#include "base/refcnt.hh"
-#include "sim/host.hh"
-#include "mem/vport.hh"
-
-class ThreadContext;
-
-namespace SparcISA {
-
-class Arguments
-{
- protected:
- ThreadContext *tc;
- int number;
- uint64_t getArg(bool fp = false);
-
- protected:
- class Data : public RefCounted
- {
- public:
- Data(){}
- ~Data();
-
- private:
- std::list<char *> data;
-
- public:
- char *alloc(size_t size);
- };
-
- RefCountingPtr<Data> data;
-
- public:
- Arguments(ThreadContext *ctx, int n = 0)
- : tc(ctx), number(n), data(NULL)
- { assert(number >= 0); data = new Data;}
- Arguments(const Arguments &args)
- : tc(args.tc), number(args.number), data(args.data) {}
- ~Arguments() {}
-
- ThreadContext *getThreadContext() const { return tc; }
-
- const Arguments &operator=(const Arguments &args) {
- tc = args.tc;
- number = args.number;
- data = args.data;
- return *this;
- }
-
- Arguments &operator++() {
- ++number;
- assert(number >= 0);
- return *this;
- }
-
- Arguments operator++(int) {
- Arguments args = *this;
- ++number;
- assert(number >= 0);
- return args;
- }
-
- Arguments &operator--() {
- --number;
- assert(number >= 0);
- return *this;
- }
-
- Arguments operator--(int) {
- Arguments args = *this;
- --number;
- assert(number >= 0);
- return args;
- }
-
- const Arguments &operator+=(int index) {
- number += index;
- assert(number >= 0);
- return *this;
- }
-
- const Arguments &operator-=(int index) {
- number -= index;
- assert(number >= 0);
- return *this;
- }
-
- Arguments operator[](int index) {
- return Arguments(tc, index);
- }
-
- template <class T>
- operator T() {
- assert(sizeof(T) <= sizeof(uint64_t));
- T data = static_cast<T>(getArg());
- return data;
- }
-
- template <class T>
- operator T *() {
- T *buf = (T *)data->alloc(sizeof(T));
- CopyData(tc, buf, getArg(), sizeof(T));
- return buf;
- }
-
- operator char *() {
- char *buf = data->alloc(2048);
- CopyStringOut(tc, buf, getArg(), 2048);
- return buf;
- }
-};
-
-}; // namespace SparcISA
-
-#endif // __ARCH_SPARC_ARGUMENTS_HH__
diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc
new file mode 100644
index 000000000..6d4358603
--- /dev/null
+++ b/src/arch/sparc/utility.cc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ * Ali Saidi
+ */
+
+#include "arch/sparc/utility.hh"
+#if FULL_SYSTEM
+#include "arch/sparc/vtophys.hh"
+#include "mem/vport.hh"
+#endif
+
+namespace SparcISA {
+
+
+//The caller uses %o0-%05 for the first 6 arguments even if their floating
+//point. Double precision floating point values take two registers/args.
+//Quads, structs, and unions are passed as pointers. All arguments beyond
+//the sixth are passed on the stack past the 16 word window save area,
+//space for the struct/union return pointer, and space reserved for the
+//first 6 arguments which the caller may use but doesn't have to.
+uint64_t getArgument(ThreadContext *tc, int number, bool fp) {
+#if FULL_SYSTEM
+ if (number < NumArgumentRegs) {
+ return tc->readIntReg(ArgumentReg[number]);
+ } else {
+ Addr sp = tc->readIntReg(StackPointerReg);
+ VirtualPort *vp = tc->getVirtPort(tc);
+ uint64_t arg = vp->read<uint64_t>(sp + 92 +
+ (number-NumArgumentRegs) * sizeof(uint64_t));
+ tc->delVirtPort(vp);
+ return arg;
+ }
+#else
+ panic("getArgument() only implemented for FULL_SYSTEM\n");
+ M5_DUMMY_RETURN
+#endif
+}
+} //namespace SPARC_ISA
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 1458231f2..9a84a82b3 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -41,6 +41,9 @@
namespace SparcISA
{
+
+ uint64_t getArgument(ThreadContext *tc, int number, bool fp);
+
static inline bool
inUserMode(ThreadContext *tc)
{
diff --git a/src/kern/linux/events.cc b/src/kern/linux/events.cc
index 42fa63a27..bfff816ca 100644
--- a/src/kern/linux/events.cc
+++ b/src/kern/linux/events.cc
@@ -29,7 +29,7 @@
* Ali Saidi
*/
-#include "arch/arguments.hh"
+#include "sim/arguments.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/events.hh"
@@ -46,7 +46,7 @@ DebugPrintkEvent::process(ThreadContext *tc)
{
if (DTRACE(DebugPrintf)) {
std::stringstream ss;
- TheISA::Arguments args(tc);
+ Arguments args(tc);
Printk(ss, args);
StringWrap name(tc->getSystemPtr()->name() + ".dprintk");
DPRINTFN("%s", ss.str());
diff --git a/src/kern/linux/printk.cc b/src/kern/linux/printk.cc
index 866353e31..24e28e666 100644
--- a/src/kern/linux/printk.cc
+++ b/src/kern/linux/printk.cc
@@ -32,7 +32,7 @@
#include <sys/types.h>
#include <algorithm>
-#include "arch/arguments.hh"
+#include "sim/arguments.hh"
#include "base/trace.hh"
#include "kern/linux/printk.hh"
@@ -40,7 +40,7 @@ using namespace std;
void
-Printk(stringstream &out, TheISA::Arguments args)
+Printk(stringstream &out, Arguments args)
{
char *p = (char *)args++;
diff --git a/src/kern/linux/printk.hh b/src/kern/linux/printk.hh
index 20dfb430f..da9564b7e 100644
--- a/src/kern/linux/printk.hh
+++ b/src/kern/linux/printk.hh
@@ -36,8 +36,8 @@
#include <sstream>
-class TheISA::Arguments;
+class Arguments;
-void Printk(std::stringstream &out, TheISA::Arguments args);
+void Printk(std::stringstream &out, Arguments args);
#endif // __PRINTK_HH__
diff --git a/src/kern/tru64/dump_mbuf.cc b/src/kern/tru64/dump_mbuf.cc
index 5ccfbca5d..e6bfc06d9 100644
--- a/src/kern/tru64/dump_mbuf.cc
+++ b/src/kern/tru64/dump_mbuf.cc
@@ -38,7 +38,7 @@
#include "kern/tru64/mbuf.hh"
#include "sim/host.hh"
#include "sim/system.hh"
-#include "arch/arguments.hh"
+#include "sim/arguments.hh"
#include "arch/isa_traits.hh"
#include "arch/vtophys.hh"
diff --git a/src/kern/tru64/dump_mbuf.hh b/src/kern/tru64/dump_mbuf.hh
index 30b1102b9..2f71fc61d 100644
--- a/src/kern/tru64/dump_mbuf.hh
+++ b/src/kern/tru64/dump_mbuf.hh
@@ -31,10 +31,10 @@
#ifndef __DUMP_MBUF_HH__
#define __DUMP_MBUF_HH__
-#include "arch/arguments.hh"
+#include "sim/arguments.hh"
namespace tru64 {
- void DumpMbuf(TheISA::Arguments args);
+ void DumpMbuf(Arguments args);
}
#endif // __DUMP_MBUF_HH__
diff --git a/src/kern/tru64/printf.cc b/src/kern/tru64/printf.cc
index 4245ac6d0..ce77efa83 100644
--- a/src/kern/tru64/printf.cc
+++ b/src/kern/tru64/printf.cc
@@ -31,18 +31,18 @@
#include <sys/types.h>
#include <algorithm>
+#include "arch/vtophys.hh"
#include "base/cprintf.hh"
#include "base/trace.hh"
#include "sim/host.hh"
-#include "arch/arguments.hh"
-#include "arch/vtophys.hh"
+#include "sim/arguments.hh"
using namespace std;
namespace tru64 {
void
-Printf(TheISA::Arguments args)
+Printf(Arguments args)
{
std::ostream &out = Trace::output();
diff --git a/src/kern/tru64/printf.hh b/src/kern/tru64/printf.hh
index ff453b1c1..5036694c0 100644
--- a/src/kern/tru64/printf.hh
+++ b/src/kern/tru64/printf.hh
@@ -31,10 +31,10 @@
#ifndef __PRINTF_HH__
#define __PRINTF_HH__
-#include "arch/arguments.hh"
+#include "sim/arguments.hh"
namespace tru64 {
- void Printf(TheISA::Arguments args);
+ void Printf(Arguments args);
}
#endif // __PRINTF_HH__
diff --git a/src/kern/tru64/tru64_events.cc b/src/kern/tru64/tru64_events.cc
index c84b25dab..c798c3ced 100644
--- a/src/kern/tru64/tru64_events.cc
+++ b/src/kern/tru64/tru64_events.cc
@@ -29,15 +29,15 @@
* Lisa Hsu
*/
+#include "arch/alpha/ev5.hh"
+#include "arch/isa_traits.hh"
#include "cpu/thread_context.hh"
#include "cpu/base.hh"
#include "kern/system_events.hh"
#include "kern/tru64/tru64_events.hh"
#include "kern/tru64/dump_mbuf.hh"
#include "kern/tru64/printf.hh"
-#include "arch/alpha/ev5.hh"
-#include "arch/arguments.hh"
-#include "arch/isa_traits.hh"
+#include "sim/arguments.hh"
#include "sim/system.hh"
using namespace TheISA;
diff --git a/src/sim/SConscript b/src/sim/SConscript
index 6bd53e205..bfa0c9a0c 100644
--- a/src/sim/SConscript
+++ b/src/sim/SConscript
@@ -50,6 +50,7 @@ Source('stat_control.cc')
Source('system.cc')
if env['FULL_SYSTEM']:
+ Source('arguments.cc')
Source('pseudo_inst.cc')
else:
SimObject('Process.py')
diff --git a/src/arch/alpha/arguments.cc b/src/sim/arguments.cc
index e89bd70b0..5aa57755a 100644
--- a/src/arch/alpha/arguments.cc
+++ b/src/sim/arguments.cc
@@ -28,12 +28,11 @@
* Authors: Nathan Binkert
*/
-#include "arch/alpha/arguments.hh"
-#include "arch/alpha/vtophys.hh"
+#include "sim/arguments.hh"
+#include "arch/utility.hh"
#include "cpu/thread_context.hh"
-#include "mem/vport.hh"
-using namespace AlphaISA;
+using namespace TheISA;
Arguments::Data::~Data()
{
@@ -54,17 +53,6 @@ Arguments::Data::alloc(size_t size)
uint64_t
Arguments::getArg(bool fp)
{
- if (number < 6) {
- if (fp)
- return tc->readFloatRegBits(16 + number);
- else
- return tc->readIntReg(16 + number);
- } else {
- Addr sp = tc->readIntReg(30);
- VirtualPort *vp = tc->getVirtPort(tc);
- uint64_t arg = vp->read<uint64_t>(sp + (number-6) * sizeof(uint64_t));
- tc->delVirtPort(vp);
- return arg;
- }
+ return TheISA::getArgument(tc, number, fp);
}
diff --git a/src/arch/alpha/arguments.hh b/src/sim/arguments.hh
index 4dba4901f..14c9e1f8a 100644
--- a/src/arch/alpha/arguments.hh
+++ b/src/sim/arguments.hh
@@ -28,20 +28,18 @@
* Authors: Nathan Binkert
*/
-#ifndef __ARCH_ALPHA_ARGUMENTS_HH__
-#define __ARCH_ALPHA_ARGUMENTS_HH__
+#ifndef __SIM_ARGUMENTS_HH__
+#define __SIM_ARGUMENTS_HH__
#include <assert.h>
-#include "arch/alpha/vtophys.hh"
+#include "arch/vtophys.hh"
#include "base/refcnt.hh"
#include "mem/vport.hh"
#include "sim/host.hh"
class ThreadContext;
-namespace AlphaISA {
-
class Arguments
{
protected:
@@ -82,6 +80,11 @@ class Arguments
return *this;
}
+ // for checking if an argument is NULL
+ bool operator!() {
+ return getArg() == 0;
+ }
+
Arguments &operator++() {
++number;
assert(number >= 0);
@@ -145,6 +148,4 @@ class Arguments
}
};
-}; // namespace AlphaISA
-
-#endif // __ARCH_ALPHA_ARGUMENTS_HH__
+#endif // __SIM_ARGUMENTS_HH__
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 05:28:11 +0000