diff options
| -rw-r--r-- | src/arch/x86/isa/bitfields.isa | 3 | ||||
| -rw-r--r-- | src/arch/x86/types.hh | 5 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/arch/x86/isa/bitfields.isa b/src/arch/x86/isa/bitfields.isa index 8707bbb4c..43fee5fef 100644 --- a/src/arch/x86/isa/bitfields.isa +++ b/src/arch/x86/isa/bitfields.isa @@ -67,11 +67,12 @@ def bitfield REX_B rex.b; //Legacy prefixes def bitfield LEGACY legacy; +def bitfield LEGACY_DECODEVAL legacy.decodeVal; def bitfield LEGACY_REPNE legacy.repne; def bitfield LEGACY_REP legacy.rep; def bitfield LEGACY_LOCK legacy.lock; -def bitfield LEGACY_ADDR legacy.addr; def bitfield LEGACY_OP legacy.op; +def bitfield LEGACY_ADDR legacy.addr; def bitfield LEGACY_SEG legacy.seg; // Pieces of the opcode diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh index 9d927679d..a509ff57a 100644 --- a/src/arch/x86/types.hh +++ b/src/arch/x86/types.hh @@ -86,11 +86,12 @@ namespace X86ISA }; BitUnion8(LegacyPrefixVector) + Bitfield<7, 4> decodeVal; Bitfield<7> repne; Bitfield<6> rep; Bitfield<5> lock; - Bitfield<4> addr; - Bitfield<3> op; + Bitfield<4> op; + Bitfield<3> addr; //There can be only one segment override, so they share the //first 3 bits in the legacyPrefixes bitfield. Bitfield<2,0> seg; |