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-rw-r--r--src/arch/arm/faults.cc10
-rw-r--r--src/arch/arm/insts/misc.cc4
-rw-r--r--src/arch/arm/isa/formats/breakpoint.isa3
-rw-r--r--src/arch/arm/utility.hh14
4 files changed, 6 insertions, 25 deletions
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index 3dd0b7f2f..aec4df4a0 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -161,13 +161,11 @@ UndefinedInstruction::invoke(ThreadContext *tc)
{
assert(unknown || mnemonic != NULL);
if (unknown) {
- panic("Attempted to execute unknown instruction "
- "(inst 0x%08x, opcode 0x%x, binary:%s)",
- machInst, machInst.opcode, inst2string(machInst));
+ panic("Attempted to execute unknown instruction (inst 0x%08x)",
+ machInst);
} else {
- panic("Attempted to execute unimplemented instruction '%s' "
- "(inst 0x%08x, opcode 0x%x, binary:%s)",
- mnemonic, machInst, machInst.opcode, inst2string(machInst));
+ panic("Attempted to execute unimplemented instruction "
+ "'%s' (inst 0x%08x)", mnemonic, machInst);
}
}
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc
index a0af4fc2f..7d383a87a 100644
--- a/src/arch/arm/insts/misc.cc
+++ b/src/arch/arm/insts/misc.cc
@@ -265,7 +265,5 @@ RegImmRegShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
std::string
UnknownOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
- return csprintf("%-10s (inst 0x%x, opcode 0x%x, binary:%s)",
- "unknown", machInst, machInst.opcode,
- inst2string(machInst));
+ return csprintf("%-10s (inst %#08x)", "unknown", machInst);
}
diff --git a/src/arch/arm/isa/formats/breakpoint.isa b/src/arch/arm/isa/formats/breakpoint.isa
index fac652d8e..d59f6a712 100644
--- a/src/arch/arm/isa/formats/breakpoint.isa
+++ b/src/arch/arm/isa/formats/breakpoint.isa
@@ -74,8 +74,7 @@ output decoder {{
std::string
Breakpoint::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
- return csprintf("%-10s (inst 0x%x, opcode 0x%x, binary:%s)",
- "Breakpoint", machInst, OPCODE, inst2string(machInst));
+ return csprintf("%-10s (inst 0x%x)", "Breakpoint", machInst);
}
}};
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 7d70b3131..6ee2fb325 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -147,20 +147,6 @@ namespace ArmISA {
return (tc->readMiscRegNoEffect(MISCREG_CPSR) & 0x1f) == MODE_USER;
}
- static inline std::string
- inst2string(MachInst machInst)
- {
- std::string str = "";
- uint32_t mask = (1 << 31);
-
- while (mask) {
- str += ((machInst & mask) ? "1" : "0");
- mask = mask >> 1;
- }
-
- return str;
- }
-
uint64_t getArgument(ThreadContext *tc, int number, bool fp);
Fault setCp15Register(uint32_t &Rd, int CRn, int opc1, int CRm, int opc2);