diff options
| -rw-r--r-- | src/arch/arm/isa/insts/macromem.isa | 3 | ||||
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index cc7366e2b..6a33d1b9f 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -58,7 +58,8 @@ let {{ microLdr2UopCode = ''' uint64_t data = Mem_ud; Dest = cSwap((uint32_t) data, ((CPSR)Cpsr).e); - Dest2 = cSwap((uint32_t) (data >> 32), ((CPSR)Cpsr).e); + IWDest2 = cSwap((uint32_t) (data >> 32), + ((CPSR)Cpsr).e); ''' microLdr2UopIop = InstObjParams('ldr2_uop', 'MicroLdr2Uop', 'MicroMemPairOp', diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 5898075ab..2e2955a80 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -193,6 +193,7 @@ def operands {{ 'Dest2': intReg('dest2'), 'XDest2': intRegX64('dest2'), 'FDest2': floatReg('dest2'), + 'IWDest2': intRegIWPC('dest2'), 'Result': intReg('result'), 'XResult': intRegX64('result'), 'XBase': intRegX64('base', id = srtBase), |