diff options
| -rw-r--r-- | src/arch/arm/isa/formats/misc.isa | 3 | ||||
| -rw-r--r-- | src/arch/arm/miscregs.hh | 6 |
2 files changed, 6 insertions, 3 deletions
diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index 33a8ae4fe..2052e0d3d 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -113,6 +113,9 @@ def format McrMrc15() {{ case MISCREG_ICIALLUIS: return new WarnUnimplemented( isRead ? "mrc icialluis" : "mcr icialluis", machInst); + case MISCREG_ICIMVAU: + return new WarnUnimplemented( + isRead ? "mrc icimvau" : "mcr icimvau", machInst); default: if (isRead) { return new Mrc15(machInst, rt, (IntRegIndex)miscReg); diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh index e4245af33..ae2cc2247 100644 --- a/src/arch/arm/miscregs.hh +++ b/src/arch/arm/miscregs.hh @@ -95,6 +95,7 @@ namespace ArmISA MISCREG_CLIDR, MISCREG_ICIALLUIS, MISCREG_ICIALLU, + MISCREG_ICIMVAU, MISCREG_CP15_UNIMP_START, MISCREG_CTR = MISCREG_CP15_UNIMP_START, MISCREG_TCMTR, @@ -133,7 +134,6 @@ namespace ArmISA MISCREG_IRACR, MISCREG_RGNR, MISCREG_BPIALLIS, - MISCREG_ICIMVAU, MISCREG_BPIALL, MISCREG_BPIMVA, MISCREG_DCIMVAC, @@ -161,7 +161,7 @@ namespace ArmISA "sctlr", "dccisw", "dccimvac", "contextidr", "tpidrurw", "tpidruro", "tpidrprw", "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", - "icialluis", "iciallu", + "icialluis", "iciallu", "icimvau", "ctr", "tcmtr", "mpuir", "mpidr", "midr", "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0", "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3", @@ -169,7 +169,7 @@ namespace ArmISA "ccsidr", "aidr", "csselr", "actlr", "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar", "drbar", "irbar", "drsr", "irsr", "dracr", "iracr", - "rgnr", "bpiallis", "icimvau", + "rgnr", "bpiallis", "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw", "dccmvau", "nop", "raz" |