diff options
| -rw-r--r-- | src/arch/x86/faults.cc | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index aa859052e..0cbf2334e 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -245,15 +245,21 @@ namespace X86ISA tc->setMiscReg(MISCREG_IDTR_BASE, 0); tc->setMiscReg(MISCREG_IDTR_LIMIT, 0xffff); + SegAttr tslAttr = 0; + tslAttr.present = 1; + tslAttr.type = 2; // LDT tc->setMiscReg(MISCREG_TSL, 0); tc->setMiscReg(MISCREG_TSL_BASE, 0); tc->setMiscReg(MISCREG_TSL_LIMIT, 0xffff); - tc->setMiscReg(MISCREG_TSL_ATTR, 0); + tc->setMiscReg(MISCREG_TSL_ATTR, tslAttr); + SegAttr trAttr = 0; + trAttr.present = 1; + trAttr.type = 3; // Busy 16-bit TSS tc->setMiscReg(MISCREG_TR, 0); tc->setMiscReg(MISCREG_TR_BASE, 0); tc->setMiscReg(MISCREG_TR_LIMIT, 0xffff); - tc->setMiscReg(MISCREG_TR_ATTR, 0); + tc->setMiscReg(MISCREG_TR_ATTR, trAttr); // This value should be the family/model/stepping of the processor. // (page 418). It should be consistent with the value from CPUID, but |