diff options
| -rw-r--r-- | src/arch/x86/isa/microops/ldstop.isa | 3 | ||||
| -rw-r--r-- | src/cpu/simple/atomic.cc | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa index 94c707f73..912aa3511 100644 --- a/src/arch/x86/isa/microops/ldstop.isa +++ b/src/arch/x86/isa/microops/ldstop.isa @@ -529,7 +529,8 @@ let {{ dataSize="env.dataSize", addressSize="env.addressSize", atCPL0=False): super(CdaOp, self).__init__("InstRegIndex(NUM_INTREGS)", segment, - addr, disp, dataSize, addressSize, "0", atCPL0, False) + addr, disp, dataSize, addressSize, "Request::NO_ACCESS", + atCPL0, False) self.className = "Cda" self.mnemonic = "cda" diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index bab4b8b51..83da618f8 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -324,7 +324,7 @@ AtomicSimpleCPU::read(Addr addr, T &data, unsigned flags) Fault fault = thread->dtb->translateAtomic(req, tc, BaseTLB::Read); // Now do the access. - if (fault == NoFault) { + if (fault == NoFault && !req->getFlags().isSet(Request::NO_ACCESS)) { Packet pkt = Packet(req, req->isLLSC() ? MemCmd::LoadLockedReq : MemCmd::ReadReq, Packet::Broadcast); @@ -481,7 +481,7 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) } } - if (do_access) { + if (do_access && !req->getFlags().isSet(Request::NO_ACCESS)) { Packet pkt = Packet(req, cmd, Packet::Broadcast); pkt.dataStatic(dataPtr); |