diff options
| -rw-r--r-- | src/mem/bus.cc | 14 | ||||
| -rw-r--r-- | src/mem/bus.hh | 3 | ||||
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 8 | ||||
| -rw-r--r-- | src/mem/physical.cc | 7 | ||||
| -rw-r--r-- | src/mem/ruby/system/RubyPort.cc | 8 |
5 files changed, 3 insertions, 37 deletions
diff --git a/src/mem/bus.cc b/src/mem/bus.cc index 00caa8289..ea1ec7322 100644 --- a/src/mem/bus.cc +++ b/src/mem/bus.cc @@ -59,7 +59,7 @@ Bus::Bus(const BusParams *p) : MemObject(p), busId(p->bus_id), clock(p->clock), headerCycles(p->header_cycles), width(p->width), tickNextIdle(0), drainEvent(NULL), busIdle(this), inRetry(false), maxId(0), - defaultPort(NULL), funcPort(NULL), funcPortId(-4), + defaultPort(NULL), useDefaultRange(p->use_default_range), defaultBlockSize(p->block_size), cachedBlockSize(0), cachedBlockSizeValid(false) { @@ -87,16 +87,6 @@ Bus::getPort(const std::string &if_name, int idx) fatal("Default port already set\n"); } int id; - if (if_name == "functional") { - if (!funcPort) { - id = maxId++; - funcPort = new BusPort(csprintf("%s-p%d-func", name(), id), this, id); - funcPortId = id; - interfaces[id] = funcPort; - } - return funcPort; - } - // if_name ignored? forced to be empty? id = maxId++; assert(maxId < std::numeric_limits<typeof(maxId)>::max()); @@ -546,7 +536,7 @@ Bus::recvRangeChange(int id) m5::hash_map<short,BusPort*>::iterator intIter; for (intIter = interfaces.begin(); intIter != interfaces.end(); intIter++) - if (intIter->first != id && intIter->first != funcPortId) + if (intIter->first != id) intIter->second->sendRangeChange(); if (id != defaultId && defaultPort) diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 6c1b4c196..2ad17cf3b 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -333,9 +333,6 @@ class Bus : public MemObject /** Port that handles requests that don't match any of the interfaces.*/ BusPort *defaultPort; - BusPort *funcPort; - int funcPortId; - /** If true, use address range provided by default device. Any address not handled by another port and not in default device's range will cause a fatal error. If false, just send all diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 46692a8d3..13484eb79 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -103,13 +103,7 @@ Cache<TagStore>::getPort(const std::string &if_name, int idx) return cpuSidePort; } else if (if_name == "mem_side") { return memSidePort; - } else if (if_name == "functional") { - CpuSidePort *funcPort = - new CpuSidePort(name() + "-cpu_side_funcport", this, - "CpuSideFuncPort"); - funcPort->setOtherPort(memSidePort); - return funcPort; - } else { + } else { panic("Port name %s unrecognized\n", if_name); } } diff --git a/src/mem/physical.cc b/src/mem/physical.cc index bab6e868c..8b319940b 100644 --- a/src/mem/physical.cc +++ b/src/mem/physical.cc @@ -372,13 +372,6 @@ PhysicalMemory::doFunctionalAccess(PacketPtr pkt) Port * PhysicalMemory::getPort(const std::string &if_name, int idx) { - // Accept request for "functional" port for backwards compatibility - // with places where this function is called from C++. I'd prefer - // to move all these into Python someday. - if (if_name == "functional") { - return new MemoryPort(csprintf("%s-functional", name()), this); - } - if (if_name != "port") { panic("PhysicalMemory::getPort: unknown port %s requested", if_name); } diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index 59c9bb19d..ce9973402 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -93,14 +93,6 @@ RubyPort::getPort(const std::string &if_name, int idx) return physMemPort; } - if (if_name == "functional") { - // Calls for the functional port only want to access - // functional memory. Therefore, directly pass these calls - // ports to physmem. - assert(physmem != NULL); - return physmem->getPort(if_name, idx); - } - return NULL; } |