summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--AUTHORS79
1 files changed, 63 insertions, 16 deletions
diff --git a/AUTHORS b/AUTHORS
index eebe40c93..249a0c9ff 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -1,47 +1,94 @@
-Steven K. Reinhardt
------------------------
Nathan L. Binkert
-----------------------
+* Alpha full system support
+* Statistics package
+* Event queue
+* Pseudo instructions
+* Remote GDB facilities
+* PC sampling
+* Trace facilities
+* Tru64 support
+* Ethernet (Link, NSGIGE, Sinic) device support
+* PCI device support
-Erik G. Hallnor
+Steven K. Reinhardt
-----------------------
+* Alpha support
+* ISA parsing
+* SWIG intergration
+* New memory system
+* Simple CPU
+* Instruction tracing
+* PC sampling
+* Deprecated detailed CPU
+* Binary Loading
-Steve E. Raasch
+Ali G. Saidi
-----------------------
+* Alpha Linux support
+* Alpha (Tsunami) platform and devices
+* I/O <-> memory interface
+* PCI device interface
+* Multiple ISA support
+* Memory bridge, bus, packet, port interfaces
+* SPARC IPRs
-Lisa R. Hsu
+Kevin T. Lim
-----------------------
-DP83820 NIC device model
+* New CPU model
+* CPU checker
+* CPU class restructuring
+* Quiecsing/Draining
+Ronald G. Dreslinski Jr
+-----------------------
+* Caches/Cache coherence
+* Prefetching
+* New memory system (port, request, packet, cache porting)
-Ali G. Saidi
+Lisa R. Hsu
-----------------------
+* DP83820 NIC device model
+* Kernel stats stuff
+* Linux Dist disk image building
-Andrew L. Schultz
+Gabriel Black
-----------------------
+* Multiple ISA support
+* Alpha support reorgization
+* SPARC SE support
-Kevin T. Lim
+Korey L. Sewell
-----------------------
-O3CPU model, CPU checker, revisions to CPU interfaces, transitioning some functionality and configurations over to Python.
+* O3CPU SMT support
+* MIPS support
-Ronald G. Dreslinski Jr
+Andrew L. Schultz
-----------------------
+* IDE controller/disk model
+* PCI devices interface
+* Linux Dist disk image building
-Gabriel Black
+Erik G. Hallnor
-----------------------
-SPARC ISA
+* Caches
+* Trace reader support
-Korey L. Sewell
+Steve E. Raasch
-----------------------
-MIPS ISA / O3CPU SMT Support
+* Deprecated CPU model
+* Generic CPU structures
David Green
-----------------------
+* Deprecated CPU model
+* Caches
Benjamin S. Nash
-----------------------
+* Alpha FreeBSD support
Miguel J. Serrano
-----------------------
-
+* Alpha FreeBSD support