diff options
| -rw-r--r-- | src/cpu/o3/commit_impl.hh | 1 | ||||
| -rw-r--r-- | src/cpu/o3/fetch_impl.hh | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index e72679710..43305f962 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -748,6 +748,7 @@ DefaultCommit<Impl>::commit() } } else { bdelay_done_seq_num = squashed_inst; + squash_bdelay_slot = true; } #endif diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 63d22b293..4c378e18b 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -1139,6 +1139,8 @@ DefaultFetch<Impl>::fetch(bool &status_change) ext_inst = TheISA::makeExtMI(inst, fetch_PC); #elif THE_ISA == SPARC_ISA ext_inst = TheISA::makeExtMI(inst, cpu->thread[tid]->getTC()); +#elif THE_ISA == MIPS_ISA + ext_inst = TheISA::makeExtMI(inst, cpu->thread[tid]->getTC()); #endif // Create a new DynInst from the instruction fetched. |