diff options
| -rw-r--r-- | src/mem/protocol/MOESI_CMP_directory-dma.sm | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mem/protocol/MOESI_CMP_directory-dma.sm b/src/mem/protocol/MOESI_CMP_directory-dma.sm index ccc7f8790..b9da0d0dc 100644 --- a/src/mem/protocol/MOESI_CMP_directory-dma.sm +++ b/src/mem/protocol/MOESI_CMP_directory-dma.sm @@ -77,6 +77,7 @@ machine(MachineType:DMA, "DMA Controller") Tick clockEdge(); void set_tbe(TBE b); void unset_tbe(); + void wakeUpAllBuffers(); State getState(TBE tbe, Addr addr) { return cur_state; @@ -249,6 +250,13 @@ machine(MachineType:DMA, "DMA Controller") unset_tbe(); } + action(zz_stallAndWaitRequestQueue, "zz", desc="...") { + stall_and_wait(dmaRequestQueue_in, address); + } + + action(wkad_wakeUpAllDependents, "wkad", desc="wake-up all dependents") { + wakeUpAllBuffers(); + } transition(READY, ReadRequest, BUSY_RD) { s_sendReadRequest; @@ -269,6 +277,7 @@ machine(MachineType:DMA, "DMA Controller") //u_updateAckCount; //o_checkForCompletion; p_popResponseQueue; + wkad_wakeUpAllDependents; } transition(BUSY_RD, All_Acks, READY) { @@ -276,6 +285,7 @@ machine(MachineType:DMA, "DMA Controller") //u_sendExclusiveUnblockToDir; w_deallocateTBE; p_popTriggerQueue; + wkad_wakeUpAllDependents; } transition(READY, WriteRequest, BUSY_WR) { @@ -301,5 +311,10 @@ machine(MachineType:DMA, "DMA Controller") u_sendExclusiveUnblockToDir; w_deallocateTBE; p_popTriggerQueue; + wkad_wakeUpAllDependents; + } + + transition({BUSY_RD,BUSY_WR}, {ReadRequest,WriteRequest}) { + zz_stallAndWaitRequestQueue; } } |