diff options
| -rw-r--r-- | src/cpu/pred/SConscript | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/src/cpu/pred/SConscript b/src/cpu/pred/SConscript index bb9342f06..763f3a9b6 100644 --- a/src/cpu/pred/SConscript +++ b/src/cpu/pred/SConscript @@ -30,15 +30,16 @@ Import('*') -if 'InOrderCPU' in env['CPU_MODELS'] or 'O3CPU' in env['CPU_MODELS'] \ - or 'Minor' in env['CPU_MODELS']: - SimObject('BranchPredictor.py') +if env['TARGET_ISA'] == 'null': + Return() - Source('bpred_unit.cc') - Source('2bit_local.cc') - Source('btb.cc') - Source('ras.cc') - Source('tournament.cc') - Source ('bi_mode.cc') - DebugFlag('FreeList') - DebugFlag('Branch') +SimObject('BranchPredictor.py') + +Source('bpred_unit.cc') +Source('2bit_local.cc') +Source('btb.cc') +Source('ras.cc') +Source('tournament.cc') +Source ('bi_mode.cc') +DebugFlag('FreeList') +DebugFlag('Branch') |