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-rw-r--r--src/arch/arm/isa/formats/data.isa10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index 28fb50194..648e04453 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -240,11 +240,11 @@ def format ArmParallelAddSubtract() {{
case 0x2:
return new WarnUnimplemented("ssax", machInst);
case 0x3:
- return new WarnUnimplemented("ssub16", machInst);
+ return new Ssub16RegCc(machInst, rd, rn, rm, 0, LSL);
case 0x4:
return new Sadd8RegCc(machInst, rd, rn, rm, 0, LSL);
case 0x7:
- return new WarnUnimplemented("ssub8", machInst);
+ return new Ssub8RegCc(machInst, rd, rn, rm, 0, LSL);
}
break;
case 0x2:
@@ -557,12 +557,14 @@ def format Thumb32DataProcReg() {{
case 0x6:
return new WarnUnimplemented("ssax", machInst);
case 0x5:
- return new WarnUnimplemented("ssub16", machInst);
+ return new Ssub16RegCc(machInst, rd,
+ rn, rm, 0, LSL);
case 0x0:
return new Sadd8RegCc(machInst, rd,
rn, rm, 0, LSL);
case 0x4:
- return new WarnUnimplemented("ssub8", machInst);
+ return new Ssub8RegCc(machInst, rd,
+ rn, rm, 0, LSL);
}
break;
case 0x1: