diff options
-rw-r--r-- | configs/example/se.py | 5 | ||||
-rw-r--r-- | configs/ruby/MESI_Three_Level.py | 4 | ||||
-rw-r--r-- | configs/ruby/MI_example.py | 4 | ||||
-rw-r--r-- | configs/ruby/MOESI_CMP_directory.py | 4 | ||||
-rw-r--r-- | configs/ruby/MOESI_CMP_token.py | 4 | ||||
-rw-r--r-- | configs/ruby/MOESI_hammer.py | 4 | ||||
-rw-r--r-- | tests/configs/simple-timing-ruby.py | 4 |
7 files changed, 20 insertions, 9 deletions
diff --git a/configs/example/se.py b/configs/example/se.py index d4f3e2dd9..d390fbad0 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -231,9 +231,10 @@ if options.ruby: # Set the option for physmem so that it is not allocated any space system.physmem = MemClass(range=AddrRange(options.mem_size), null = True) - options.use_map = True - Ruby.create_system(options, system) + + system.piobus = NoncoherentBus() + Ruby.create_system(options, system, system.piobus) assert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) for i in xrange(np): diff --git a/configs/ruby/MESI_Three_Level.py b/configs/ruby/MESI_Three_Level.py index f9435a1e4..67ed9af74 100644 --- a/configs/ruby/MESI_Three_Level.py +++ b/configs/ruby/MESI_Three_Level.py @@ -117,7 +117,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system): cluster_id = i, ruby_system = ruby_system) if piobus != None: - cpu_seq.pio_port = piobus.slave + cpu_seq.pio_master_port = piobus.slave + cpu_seq.mem_master_port = piobus.slave + cpu_seq.pio_slave_port = piobus.master exec("ruby_system.l0_cntrl%d = l0_cntrl" % ( i*num_cpus_per_cluster+j)) diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py index 8f6c6e490..ed18c14cb 100644 --- a/configs/ruby/MI_example.py +++ b/configs/ruby/MI_example.py @@ -92,7 +92,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system): l1_cntrl.sequencer = cpu_seq if piobus != None: - cpu_seq.pio_port = piobus.slave + cpu_seq.pio_master_port = piobus.slave + cpu_seq.mem_master_port = piobus.slave + cpu_seq.pio_slave_port = piobus.master exec("ruby_system.l1_cntrl%d = l1_cntrl" % i) # diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py index 9ebee8952..0af4643af 100644 --- a/configs/ruby/MOESI_CMP_directory.py +++ b/configs/ruby/MOESI_CMP_directory.py @@ -102,7 +102,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system): l1_cntrl.sequencer = cpu_seq if piobus != None: - cpu_seq.pio_port = piobus.slave + cpu_seq.pio_master_port = piobus.slave + cpu_seq.mem_master_port = piobus.slave + cpu_seq.pio_slave_port = piobus.master exec("ruby_system.l1_cntrl%d = l1_cntrl" % i) # diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py index 699f159f8..78ccef71a 100644 --- a/configs/ruby/MOESI_CMP_token.py +++ b/configs/ruby/MOESI_CMP_token.py @@ -122,7 +122,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system): l1_cntrl.sequencer = cpu_seq if piobus != None: - cpu_seq.pio_port = piobus.slave + cpu_seq.pio_master_port = piobus.slave + cpu_seq.mem_master_port = piobus.slave + cpu_seq.pio_slave_port = piobus.master exec("ruby_system.l1_cntrl%d = l1_cntrl" % i) # diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py index 47e37de30..d716aba7a 100644 --- a/configs/ruby/MOESI_hammer.py +++ b/configs/ruby/MOESI_hammer.py @@ -115,7 +115,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system): l1_cntrl.sequencer = cpu_seq if piobus != None: - cpu_seq.pio_port = piobus.slave + cpu_seq.pio_master_port = piobus.slave + cpu_seq.mem_master_port = piobus.slave + cpu_seq.pio_slave_port = piobus.master if options.recycle_latency: l1_cntrl.recycle_latency = options.recycle_latency diff --git a/tests/configs/simple-timing-ruby.py b/tests/configs/simple-timing-ruby.py index df8fdf2be..d3f4ad2ae 100644 --- a/tests/configs/simple-timing-ruby.py +++ b/tests/configs/simple-timing-ruby.py @@ -79,8 +79,8 @@ system.cpu.clk_domain = SrcClockDomain(clock = '2GHz', voltage_domain = system.voltage_domain) system.mem_ranges = AddrRange('256MB') - -Ruby.create_system(options, system) +system.piobus = NoncoherentBus() +Ruby.create_system(options, system, system.piobus) # Create a separate clock for Ruby system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, |