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-rw-r--r--src/mem/cache/cache_impl.hh5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index a7c9a4a55..fc01e2c06 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -520,7 +520,10 @@ Cache<TagStore>::timingAccess(PacketPtr pkt)
MSHR *mshr = mshrQueue.findMatch(blk_addr);
if (mshr) {
- // MSHR hit
+ /// MSHR hit
+ /// @note writebacks will be checked in getNextMSHR()
+ /// for any conflicting requests to the same block
+
//@todo remove hw_pf here
assert(pkt->req->masterId() < system->maxMasters());
mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++;