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-rw-r--r--src/dev/Device.py2
-rw-r--r--src/dev/Pci.py6
-rw-r--r--src/dev/i8254xGBe.cc2
3 files changed, 4 insertions, 6 deletions
diff --git a/src/dev/Device.py b/src/dev/Device.py
index b1a4f69bc..3a06444cb 100644
--- a/src/dev/Device.py
+++ b/src/dev/Device.py
@@ -40,7 +40,7 @@ class BasicPioDevice(PioDevice):
type = 'BasicPioDevice'
abstract = True
pio_addr = Param.Addr("Device Address")
- pio_latency = Param.Latency('1ns', "Programmed IO latency")
+ pio_latency = Param.Latency('100ns', "Programmed IO latency")
class DmaDevice(PioDevice):
type = 'DmaDevice'
diff --git a/src/dev/Pci.py b/src/dev/Pci.py
index db2791ed5..4d2baa3e8 100644
--- a/src/dev/Pci.py
+++ b/src/dev/Pci.py
@@ -34,9 +34,7 @@ from Device import BasicPioDevice, DmaDevice, PioDevice
class PciConfigAll(PioDevice):
type = 'PciConfigAll'
platform = Param.Platform(Parent.any, "Platform this device is part of.")
- # @todo: This latency is unrealistically low and only kept at 1 tick
- # to not change any regressions
- pio_latency = Param.Latency('1t', "Programmed IO latency")
+ pio_latency = Param.Latency('30ns', "Programmed IO latency")
bus = Param.UInt8(0x00, "PCI bus to act as config space for")
size = Param.MemorySize32('16MB', "Size of config space")
@@ -49,7 +47,7 @@ class PciDevice(DmaDevice):
pci_bus = Param.Int("PCI bus")
pci_dev = Param.Int("PCI device number")
pci_func = Param.Int("PCI function code")
- pio_latency = Param.Latency('1ns', "Programmed IO latency")
+ pio_latency = Param.Latency('30ns', "Programmed IO latency")
config_latency = Param.Latency('20ns', "Config read or write latency")
VendorID = Param.UInt16("Vendor ID")
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index d2b7c0f75..159cc4726 100644
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -160,7 +160,7 @@ IGbE::writeConfig(PacketPtr pkt)
// Some work may need to be done here based for the pci COMMAND bits.
//
- return pioDelay;
+ return configDelay;
}
// Handy macro for range-testing register access addresses