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-rw-r--r--src/arch/x86/insts/micromediaop.hh14
-rw-r--r--src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py24
-rw-r--r--src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py72
-rw-r--r--src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py36
-rw-r--r--src/arch/x86/isa/microops/mediaop.isa46
5 files changed, 96 insertions, 96 deletions
diff --git a/src/arch/x86/insts/micromediaop.hh b/src/arch/x86/insts/micromediaop.hh
index e1fde70ad..508ef4e26 100644
--- a/src/arch/x86/insts/micromediaop.hh
+++ b/src/arch/x86/insts/micromediaop.hh
@@ -42,7 +42,7 @@ namespace X86ISA
const RegIndex dest;
const uint8_t srcSize;
const uint8_t destSize;
- const uint8_t sel;
+ const uint8_t ext;
static const RegIndex foldOBit = 0;
// Constructor
@@ -51,13 +51,13 @@ namespace X86ISA
bool isMicro, bool isDelayed,
bool isFirst, bool isLast,
InstRegIndex _src1, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint8_t _sel,
+ uint8_t _srcSize, uint8_t _destSize, uint8_t _ext,
OpClass __opClass) :
X86MicroopBase(_machInst, mnem, _instMnem,
isMicro, isDelayed, isFirst, isLast,
__opClass),
src1(_src1.idx), dest(_dest.idx),
- srcSize(_srcSize), destSize(_destSize), sel(_sel)
+ srcSize(_srcSize), destSize(_destSize), ext(_ext)
{}
};
@@ -72,11 +72,11 @@ namespace X86ISA
bool isMicro, bool isDelayed,
bool isFirst, bool isLast,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint8_t _sel,
+ uint8_t _srcSize, uint8_t _destSize, uint8_t _ext,
OpClass __opClass) :
MediaOpBase(_machInst, mnem, _instMnem,
isMicro, isDelayed, isFirst, isLast,
- _src1, _dest, _srcSize, _destSize, _sel,
+ _src1, _dest, _srcSize, _destSize, _ext,
__opClass),
src2(_src2.idx)
{}
@@ -96,11 +96,11 @@ namespace X86ISA
bool isMicro, bool isDelayed,
bool isFirst, bool isLast,
InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint8_t _sel,
+ uint8_t _srcSize, uint8_t _destSize, uint8_t _ext,
OpClass __opClass) :
MediaOpBase(_machInst, mnem, _instMnem,
isMicro, isDelayed, isFirst, isLast,
- _src1, _dest, _srcSize, _destSize, _sel,
+ _src1, _dest, _srcSize, _destSize, _ext,
__opClass),
imm8(_imm8)
{}
diff --git a/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py b/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py
index 9244f5e6d..0bf654b15 100644
--- a/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py
+++ b/src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py
@@ -55,21 +55,21 @@
microcode = '''
def macroop UNPCKLPS_XMM_XMM {
- unpack xmmh, xmml, xmmlm, sel=1, size=4
- unpack xmml, xmml, xmmlm, sel=0, size=4
+ unpack xmmh, xmml, xmmlm, ext=1, size=4
+ unpack xmml, xmml, xmmlm, ext=0, size=4
};
def macroop UNPCKLPS_XMM_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=4
- unpack xmml, xmml, ufp1, sel=0, size=4
+ unpack xmmh, xmml, ufp1, ext=1, size=4
+ unpack xmml, xmml, ufp1, ext=0, size=4
};
def macroop UNPCKLPS_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=4
- unpack xmml, xmml, ufp1, sel=0, size=4
+ unpack xmmh, xmml, ufp1, ext=1, size=4
+ unpack xmml, xmml, ufp1, ext=0, size=4
};
def macroop UNPCKLPD_XMM_XMM {
@@ -86,23 +86,23 @@ def macroop UNPCKLPD_XMM_P {
};
def macroop UNPCKHPS_XMM_XMM {
- unpack xmml, xmmh, xmmhm, sel=0, size=4
- unpack xmmh, xmmh, xmmhm, sel=1, size=4
+ unpack xmml, xmmh, xmmhm, ext=0, size=4
+ unpack xmmh, xmmh, xmmhm, ext=1, size=4
};
def macroop UNPCKHPS_XMM_M {
lea t1, seg, sib, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=4
- unpack xmmh, xmmh, ufp1, sel=1, size=4
+ unpack xmml, xmmh, ufp1, ext=0, size=4
+ unpack xmmh, xmmh, ufp1, ext=1, size=4
};
def macroop UNPCKHPS_XMM_P {
rdip t7
lea t1, seg, riprel, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=4
- unpack xmmh, xmmh, ufp1, sel=1, size=4
+ unpack xmml, xmmh, ufp1, ext=0, size=4
+ unpack xmmh, xmmh, ufp1, ext=1, size=4
};
def macroop UNPCKHPD_XMM_XMM {
diff --git a/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py b/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
index be58a2551..b4dfb4607 100644
--- a/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
+++ b/src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py
@@ -55,117 +55,117 @@
microcode = '''
def macroop PUNPCKLBW_XMM_XMM {
- unpack xmmh, xmml, xmmlm, sel=1, size=1
- unpack xmml, xmml, xmmlm, sel=0, size=1
+ unpack xmmh, xmml, xmmlm, ext=1, size=1
+ unpack xmml, xmml, xmmlm, ext=0, size=1
};
def macroop PUNPCKLBW_XMM_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=1
- unpack xmml, xmml, ufp1, sel=0, size=1
+ unpack xmmh, xmml, ufp1, ext=1, size=1
+ unpack xmml, xmml, ufp1, ext=0, size=1
};
def macroop PUNPCKLBW_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=1
- unpack xmml, xmml, ufp1, sel=0, size=1
+ unpack xmmh, xmml, ufp1, ext=1, size=1
+ unpack xmml, xmml, ufp1, ext=0, size=1
};
def macroop PUNPCKLWD_XMM_XMM {
- unpack xmmh, xmml, xmmlm, sel=1, size=2
- unpack xmml, xmml, xmmlm, sel=0, size=2
+ unpack xmmh, xmml, xmmlm, ext=1, size=2
+ unpack xmml, xmml, xmmlm, ext=0, size=2
};
def macroop PUNPCKLWD_XMM_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=2
- unpack xmml, xmml, ufp1, sel=0, size=2
+ unpack xmmh, xmml, ufp1, ext=1, size=2
+ unpack xmml, xmml, ufp1, ext=0, size=2
};
def macroop PUNPCKLWD_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=2
- unpack xmml, xmml, ufp1, sel=0, size=2
+ unpack xmmh, xmml, ufp1, ext=1, size=2
+ unpack xmml, xmml, ufp1, ext=0, size=2
};
def macroop PUNPCKLDQ_XMM_XMM {
- unpack xmmh, xmml, xmmlm, sel=1, size=4
- unpack xmml, xmml, xmmlm, sel=0, size=4
+ unpack xmmh, xmml, xmmlm, ext=1, size=4
+ unpack xmml, xmml, xmmlm, ext=0, size=4
};
def macroop PUNPCKLDQ_XMM_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=4
- unpack xmml, xmml, ufp1, sel=0, size=4
+ unpack xmmh, xmml, ufp1, ext=1, size=4
+ unpack xmml, xmml, ufp1, ext=0, size=4
};
def macroop PUNPCKLDQ_XMM_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack xmmh, xmml, ufp1, sel=1, size=4
- unpack xmml, xmml, ufp1, sel=0, size=4
+ unpack xmmh, xmml, ufp1, ext=1, size=4
+ unpack xmml, xmml, ufp1, ext=0, size=4
};
def macroop PUNPCKHBW_XMM_XMM {
- unpack xmml, xmmh, xmmhm, sel=0, size=1
- unpack xmmh, xmmh, xmmhm, sel=1, size=1
+ unpack xmml, xmmh, xmmhm, ext=0, size=1
+ unpack xmmh, xmmh, xmmhm, ext=1, size=1
};
def macroop PUNPCKHBW_XMM_M {
lea t1, seg, sib, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=1
- unpack xmmh, xmmh, ufp1, sel=1, size=1
+ unpack xmml, xmmh, ufp1, ext=0, size=1
+ unpack xmmh, xmmh, ufp1, ext=1, size=1
};
def macroop PUNPCKHBW_XMM_P {
rdip t7
lea t1, seg, riprel, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=1
- unpack xmmh, xmmh, ufp1, sel=1, size=1
+ unpack xmml, xmmh, ufp1, ext=0, size=1
+ unpack xmmh, xmmh, ufp1, ext=1, size=1
};
def macroop PUNPCKHWD_XMM_XMM {
- unpack xmml, xmmh, xmmhm, sel=0, size=2
- unpack xmmh, xmmh, xmmhm, sel=1, size=2
+ unpack xmml, xmmh, xmmhm, ext=0, size=2
+ unpack xmmh, xmmh, xmmhm, ext=1, size=2
};
def macroop PUNPCKHWD_XMM_M {
lea t1, seg, sib, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=2
- unpack xmmh, xmmh, ufp1, sel=1, size=2
+ unpack xmml, xmmh, ufp1, ext=0, size=2
+ unpack xmmh, xmmh, ufp1, ext=1, size=2
};
def macroop PUNPCKHWD_XMM_P {
rdip t7
lea t1, seg, riprel, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=2
- unpack xmmh, xmmh, ufp1, sel=1, size=2
+ unpack xmml, xmmh, ufp1, ext=0, size=2
+ unpack xmmh, xmmh, ufp1, ext=1, size=2
};
def macroop PUNPCKHDQ_XMM_XMM {
- unpack xmml, xmmh, xmmhm, sel=0, size=4
- unpack xmmh, xmmh, xmmhm, sel=1, size=4
+ unpack xmml, xmmh, xmmhm, ext=0, size=4
+ unpack xmmh, xmmh, xmmhm, ext=1, size=4
};
def macroop PUNPCKHDQ_XMM_M {
lea t1, seg, sib, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=4
- unpack xmmh, xmmh, ufp1, sel=1, size=4
+ unpack xmml, xmmh, ufp1, ext=0, size=4
+ unpack xmmh, xmmh, ufp1, ext=1, size=4
};
def macroop PUNPCKHDQ_XMM_P {
rdip t7
lea t1, seg, riprel, disp, dataSize=asz
ldfp ufp1, seg, [1, t0, t1], 8, dataSize=8
- unpack xmml, xmmh, ufp1, sel=0, size=4
- unpack xmmh, xmmh, ufp1, sel=1, size=4
+ unpack xmml, xmmh, ufp1, ext=0, size=4
+ unpack xmmh, xmmh, ufp1, ext=1, size=4
};
def macroop PUNPCKHQDQ_XMM_XMM {
diff --git a/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py b/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
index 0743b43c5..5a58beca3 100644
--- a/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
+++ b/src/arch/x86/isa/insts/simd64/integer/data_reordering/unpack_and_interleave.py
@@ -55,92 +55,92 @@
microcode = '''
def macroop PUNPCKLBW_MMX_MMX {
- unpack mmx, mmx, mmxm, sel=0, size=1
+ unpack mmx, mmx, mmxm, ext=0, size=1
};
def macroop PUNPCKLBW_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=0, size=1
+ unpack mmx, mmx, ufp1, ext=0, size=1
};
def macroop PUNPCKLBW_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=0, size=1
+ unpack mmx, mmx, ufp1, ext=0, size=1
};
def macroop PUNPCKLWD_MMX_MMX {
- unpack mmx, mmx, mmxm, sel=0, size=2
+ unpack mmx, mmx, mmxm, ext=0, size=2
};
def macroop PUNPCKLWD_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=0, size=2
+ unpack mmx, mmx, ufp1, ext=0, size=2
};
def macroop PUNPCKLWD_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=0, size=2
+ unpack mmx, mmx, ufp1, ext=0, size=2
};
def macroop PUNPCKLDQ_MMX_MMX {
- unpack mmx, mmx, mmxm, sel=0, size=4
+ unpack mmx, mmx, mmxm, ext=0, size=4
};
def macroop PUNPCKLDQ_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=0, size=4
+ unpack mmx, mmx, ufp1, ext=0, size=4
};
def macroop PUNPCKLDQ_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=0, size=4
+ unpack mmx, mmx, ufp1, ext=0, size=4
};
def macroop PUNPCKHBW_MMX_MMX {
- unpack mmx, mmx, mmxm, sel=1, size=1
+ unpack mmx, mmx, mmxm, ext=1, size=1
};
def macroop PUNPCKHBW_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=1, size=1
+ unpack mmx, mmx, ufp1, ext=1, size=1
};
def macroop PUNPCKHBW_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=1, size=1
+ unpack mmx, mmx, ufp1, ext=1, size=1
};
def macroop PUNPCKHWD_MMX_MMX {
- unpack mmx, mmx, mmxm, sel=1, size=2
+ unpack mmx, mmx, mmxm, ext=1, size=2
};
def macroop PUNPCKHWD_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=1, size=2
+ unpack mmx, mmx, ufp1, ext=1, size=2
};
def macroop PUNPCKHWD_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=1, size=2
+ unpack mmx, mmx, ufp1, ext=1, size=2
};
def macroop PUNPCKHDQ_MMX_MMX {
- unpack mmx, mmx, mmxm, sel=1, size=4
+ unpack mmx, mmx, mmxm, ext=1, size=4
};
def macroop PUNPCKHDQ_MMX_M {
ldfp ufp1, seg, sib, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=1, size=4
+ unpack mmx, mmx, ufp1, ext=1, size=4
};
def macroop PUNPCKHDQ_MMX_P {
rdip t7
ldfp ufp1, seg, riprel, disp, dataSize=8
- unpack mmx, mmx, ufp1, sel=1, size=4
+ unpack mmx, mmx, ufp1, ext=1, size=4
};
'''
diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa
index 35e0f8f35..048a856f9 100644
--- a/src/arch/x86/isa/microops/mediaop.isa
+++ b/src/arch/x86/isa/microops/mediaop.isa
@@ -57,12 +57,12 @@ def template MediaOpRegDeclare {{
const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel);
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel);
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
%(BasicExecDeclare)s
};
@@ -80,12 +80,12 @@ def template MediaOpImmDeclare {{
const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel);
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel);
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
%(BasicExecDeclare)s
};
@@ -101,10 +101,10 @@ def template MediaOpRegConstructor {{
inline %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel) :
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
false, false, false, false,
- _src1, _src2, _dest, _srcSize, _destSize, _sel,
+ _src1, _src2, _dest, _srcSize, _destSize, _ext,
%(op_class)s)
{
buildMe();
@@ -114,10 +114,10 @@ def template MediaOpRegConstructor {{
ExtMachInst machInst, const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel) :
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
isMicro, isDelayed, isFirst, isLast,
- _src1, _src2, _dest, _srcSize, _destSize, _sel,
+ _src1, _src2, _dest, _srcSize, _destSize, _ext,
%(op_class)s)
{
buildMe();
@@ -134,10 +134,10 @@ def template MediaOpImmConstructor {{
inline %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel) :
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
false, false, false, false,
- _src1, _imm8, _dest, _srcSize, _destSize, _sel,
+ _src1, _imm8, _dest, _srcSize, _destSize, _ext,
%(op_class)s)
{
buildMe();
@@ -147,10 +147,10 @@ def template MediaOpImmConstructor {{
ExtMachInst machInst, const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
- uint8_t _srcSize, uint8_t _destSize, uint16_t _sel) :
+ uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
isMicro, isDelayed, isFirst, isLast,
- _src1, _imm8, _dest, _srcSize, _destSize, _sel,
+ _src1, _imm8, _dest, _srcSize, _destSize, _ext,
%(op_class)s)
{
buildMe();
@@ -252,7 +252,7 @@ let {{
abstract = True
def __init__(self, dest, src1, op2,
- size = None, destSize = None, srcSize = None, sel = None):
+ size = None, destSize = None, srcSize = None, ext = None):
self.dest = dest
self.src1 = src1
self.op2 = op2
@@ -267,10 +267,10 @@ let {{
raise Exception, "Source size not set."
if self.destSize is None:
raise Exception, "Dest size not set."
- if sel is None:
- self.sel = 0
+ if ext is None:
+ self.ext = 0
else:
- self.sel = sel
+ self.ext = ext
def getAllocator(self, *microFlags):
className = self.className
@@ -278,21 +278,21 @@ let {{
className += "Imm"
allocator = '''new %(class_name)s(machInst, macrocodeBlock
%(flags)s, %(src1)s, %(op2)s, %(dest)s,
- %(srcSize)s, %(destSize)s, %(sel)s)''' % {
+ %(srcSize)s, %(destSize)s, %(ext)s)''' % {
"class_name" : className,
"flags" : self.microFlagsText(microFlags),
"src1" : self.src1, "op2" : self.op2,
"dest" : self.dest,
"srcSize" : self.srcSize,
"destSize" : self.destSize,
- "sel" : self.sel}
+ "ext" : self.ext}
return allocator
class Mov2int(MediaOp):
def __init__(self, dest, src, \
- size = None, destSize = None, srcSize = None, sel = None):
+ size = None, destSize = None, srcSize = None, ext = None):
super(Mov2int, self).__init__(dest, src,\
- "InstRegIndex(0)", size, destSize, srcSize, sel)
+ "InstRegIndex(0)", size, destSize, srcSize, ext)
code = '''
uint64_t fpSrcReg1 = bits(FpSrcReg1.uqw, srcSize * 8 - 1, 0);
DestReg = merge(DestReg, fpSrcReg1, destSize);
@@ -300,9 +300,9 @@ let {{
class Mov2fp(MediaOp):
def __init__(self, dest, src, \
- size = None, destSize = None, srcSize = None, sel = None):
+ size = None, destSize = None, srcSize = None, ext = None):
super(Mov2fp, self).__init__(dest, src,\
- "InstRegIndex(0)", size, destSize, srcSize, sel)
+ "InstRegIndex(0)", size, destSize, srcSize, ext)
code = '''
uint64_t srcReg1 = pick(SrcReg1, 0, srcSize);
FpDestReg.uqw =
@@ -314,7 +314,7 @@ let {{
assert(srcSize == destSize);
int size = destSize;
int items = (sizeof(FloatRegBits) / size) / 2;
- int offset = sel ? items : 0;
+ int offset = ext ? items : 0;
uint64_t result = 0;
for (int i = 0; i < items; i++) {
uint64_t pickedLow =