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-rw-r--r--configs/example/memtest-ruby.py2
-rw-r--r--configs/example/ruby_fs.py2
-rw-r--r--configs/example/ruby_se.py2
-rw-r--r--configs/example/rubytest.py2
-rw-r--r--configs/ruby/MESI_CMP_directory.py25
-rw-r--r--configs/ruby/MI_example.py27
-rw-r--r--configs/ruby/MOESI_CMP_directory.py24
-rw-r--r--configs/ruby/MOESI_CMP_token.py29
-rw-r--r--configs/ruby/MOESI_hammer.py27
-rw-r--r--configs/ruby/Ruby.py7
10 files changed, 94 insertions, 53 deletions
diff --git a/configs/example/memtest-ruby.py b/configs/example/memtest-ruby.py
index 567af03d0..d67f300fc 100644
--- a/configs/example/memtest-ruby.py
+++ b/configs/example/memtest-ruby.py
@@ -111,7 +111,7 @@ system = System(cpu = cpus,
funcmem = PhysicalMemory(),
physmem = PhysicalMemory())
-system.ruby = Ruby.create_system(options, system.physmem)
+system.ruby = Ruby.create_system(options, system)
assert(len(cpus) == len(system.ruby.cpu_ruby_ports))
diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py
index b6d9a6c0a..a4ae1c76b 100644
--- a/configs/example/ruby_fs.py
+++ b/configs/example/ruby_fs.py
@@ -113,7 +113,7 @@ CPUClass.clock = options.clock
system = makeLinuxAlphaRubySystem(test_mem_mode, bm[0])
system.ruby = Ruby.create_system(options,
- system.physmem,
+ system,
system.piobus,
system.dma_devices)
diff --git a/configs/example/ruby_se.py b/configs/example/ruby_se.py
index 7a55e1513..a0e839bae 100644
--- a/configs/example/ruby_se.py
+++ b/configs/example/ruby_se.py
@@ -150,7 +150,7 @@ np = options.num_cpus
system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
physmem = PhysicalMemory())
-system.ruby = Ruby.create_system(options, system.physmem)
+system.ruby = Ruby.create_system(options, system)
assert(options.num_cpus == len(system.ruby.cpu_ruby_ports))
diff --git a/configs/example/rubytest.py b/configs/example/rubytest.py
index 2a789c979..a4daf6b82 100644
--- a/configs/example/rubytest.py
+++ b/configs/example/rubytest.py
@@ -92,7 +92,7 @@ tester = RubyTester(checks_to_complete = options.checks,
#
system = System(physmem = PhysicalMemory())
-system.ruby = Ruby.create_system(options, system.physmem)
+system.ruby = Ruby.create_system(options, system)
assert(options.num_cpus == len(system.ruby.cpu_ruby_ports))
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py
index 2e9345212..d336ca7e4 100644
--- a/configs/ruby/MESI_CMP_directory.py
+++ b/configs/ruby/MESI_CMP_directory.py
@@ -47,7 +47,7 @@ class L2Cache(RubyCache):
def define_options(parser):
return
-def create_system(options, phys_mem, piobus, dma_devices):
+def create_system(options, system, piobus, dma_devices):
if buildEnv['PROTOCOL'] != 'MESI_CMP_directory':
panic("This script requires the MESI_CMP_directory protocol to be built.")
@@ -81,8 +81,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
cpu_seq = RubySequencer(version = i,
icache = l1i_cache,
dcache = l1d_cache,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
if piobus != None:
cpu_seq.pio_port = piobus.port
@@ -92,7 +92,11 @@ def create_system(options, phys_mem, piobus, dma_devices):
L1IcacheMemory = l1i_cache,
L1DcacheMemory = l1d_cache,
l2_select_num_bits = \
- math.log(options.num_l2caches, 2))
+ math.log(options.num_l2caches,
+ 2))
+
+ exec("system.l1_cntrl%d = l1_cntrl" % i)
+
#
# Add controllers and sequencers to the appropriate lists
#
@@ -109,9 +113,11 @@ def create_system(options, phys_mem, piobus, dma_devices):
l2_cntrl = L2Cache_Controller(version = i,
L2cacheMemory = l2_cache)
+ exec("system.l2_cntrl%d = l2_cntrl" % i)
l2_cntrl_nodes.append(l2_cntrl)
- phys_mem_size = long(phys_mem.range.second) - long(phys_mem.range.first) + 1
+ phys_mem_size = long(system.physmem.range.second) - \
+ long(system.physmem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
@@ -127,9 +133,11 @@ def create_system(options, phys_mem, piobus, dma_devices):
dir_cntrl = Directory_Controller(version = i,
directory = \
RubyDirectoryMemory(version = i,
- size = dir_size),
+ size = \
+ dir_size),
memBuffer = mem_cntrl)
+ exec("system.dir_cntrl%d = dir_cntrl" % i)
dir_cntrl_nodes.append(dir_cntrl)
for i, dma_device in enumerate(dma_devices):
@@ -137,13 +145,14 @@ def create_system(options, phys_mem, piobus, dma_devices):
# Create the Ruby objects associated with the dma controller
#
dma_seq = DMASequencer(version = i,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq)
dma_cntrl.dma_sequencer.port = dma_device.dma
+ exec("system.dma_cntrl%d = dma_cntrl" % i)
dma_cntrl_nodes.append(dma_cntrl)
all_cntrls = l1_cntrl_nodes + \
diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py
index ce0918de8..c51e19e09 100644
--- a/configs/ruby/MI_example.py
+++ b/configs/ruby/MI_example.py
@@ -40,7 +40,7 @@ class Cache(RubyCache):
def define_options(parser):
return
-def create_system(options, phys_mem, piobus, dma_devices):
+def create_system(options, system, piobus, dma_devices):
if buildEnv['PROTOCOL'] != 'MI_example':
panic("This script requires the MI_example protocol to be built.")
@@ -76,8 +76,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
cpu_seq = RubySequencer(version = i,
icache = cache,
dcache = cache,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
if piobus != None:
cpu_seq.pio_port = piobus.port
@@ -85,13 +85,16 @@ def create_system(options, phys_mem, piobus, dma_devices):
l1_cntrl = L1Cache_Controller(version = i,
sequencer = cpu_seq,
cacheMemory = cache)
+
+ exec("system.l1_cntrl%d = l1_cntrl" % i)
#
# Add controllers and sequencers to the appropriate lists
#
cpu_sequencers.append(cpu_seq)
l1_cntrl_nodes.append(l1_cntrl)
- phys_mem_size = long(phys_mem.range.second) - long(phys_mem.range.first) + 1
+ phys_mem_size = long(system.physmem.range.second) - \
+ long(system.physmem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
@@ -106,12 +109,15 @@ def create_system(options, phys_mem, piobus, dma_devices):
dir_cntrl = Directory_Controller(version = i,
directory = \
- RubyDirectoryMemory(version = i,
- size = dir_size,
- use_map = options.use_map,
- map_levels = options.map_levels),
+ RubyDirectoryMemory( \
+ version = i,
+ size = dir_size,
+ use_map = options.use_map,
+ map_levels = \
+ options.map_levels),
memBuffer = mem_cntrl)
+ exec("system.dir_cntrl%d = dir_cntrl" % i)
dir_cntrl_nodes.append(dir_cntrl)
for i, dma_device in enumerate(dma_devices):
@@ -119,12 +125,13 @@ def create_system(options, phys_mem, piobus, dma_devices):
# Create the Ruby objects associated with the dma controller
#
dma_seq = DMASequencer(version = i,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq)
+ exec("system.dma_cntrl%d = dma_cntrl" % i)
dma_cntrl.dma_sequencer.port = dma_device.dma
dma_cntrl_nodes.append(dma_cntrl)
diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py
index 8c332f8e4..ebc628fc0 100644
--- a/configs/ruby/MOESI_CMP_directory.py
+++ b/configs/ruby/MOESI_CMP_directory.py
@@ -47,7 +47,7 @@ class L2Cache(RubyCache):
def define_options(parser):
return
-def create_system(options, phys_mem, piobus, dma_devices):
+def create_system(options, system, piobus, dma_devices):
if buildEnv['PROTOCOL'] != 'MOESI_CMP_directory':
panic("This script requires the MOESI_CMP_directory protocol to be built.")
@@ -81,8 +81,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
cpu_seq = RubySequencer(version = i,
icache = l1i_cache,
dcache = l1d_cache,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
if piobus != None:
cpu_seq.pio_port = piobus.port
@@ -92,7 +92,10 @@ def create_system(options, phys_mem, piobus, dma_devices):
L1IcacheMemory = l1i_cache,
L1DcacheMemory = l1d_cache,
l2_select_num_bits = \
- math.log(options.num_l2caches, 2))
+ math.log(options.num_l2caches,
+ 2))
+
+ exec("system.l1_cntrl%d = l1_cntrl" % i)
#
# Add controllers and sequencers to the appropriate lists
#
@@ -109,9 +112,11 @@ def create_system(options, phys_mem, piobus, dma_devices):
l2_cntrl = L2Cache_Controller(version = i,
L2cacheMemory = l2_cache)
+ exec("system.l2_cntrl%d = l2_cntrl" % i)
l2_cntrl_nodes.append(l2_cntrl)
- phys_mem_size = long(phys_mem.range.second) - long(phys_mem.range.first) + 1
+ phys_mem_size = long(system.physmem.range.second) - \
+ long(system.physmem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
@@ -127,9 +132,11 @@ def create_system(options, phys_mem, piobus, dma_devices):
dir_cntrl = Directory_Controller(version = i,
directory = \
RubyDirectoryMemory(version = i,
- size = dir_size),
+ size = \
+ dir_size),
memBuffer = mem_cntrl)
+ exec("system.dir_cntrl%d = dir_cntrl" % i)
dir_cntrl_nodes.append(dir_cntrl)
for i, dma_device in enumerate(dma_devices):
@@ -137,12 +144,13 @@ def create_system(options, phys_mem, piobus, dma_devices):
# Create the Ruby objects associated with the dma controller
#
dma_seq = DMASequencer(version = i,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq)
+ exec("system.dma_cntrl%d = dma_cntrl" % i)
dma_cntrl.dma_sequencer.port = dma_device.dma
dma_cntrl_nodes.append(dma_cntrl)
diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py
index f5777732f..db704cfd8 100644
--- a/configs/ruby/MOESI_CMP_token.py
+++ b/configs/ruby/MOESI_CMP_token.py
@@ -52,7 +52,7 @@ def define_options(parser):
parser.add_option("--disable-dyn-timeouts", action="store_true",
help="Token_CMP: disable dyanimc timeouts, use fixed latency instead")
-def create_system(options, phys_mem, piobus, dma_devices):
+def create_system(options, system, piobus, dma_devices):
if buildEnv['PROTOCOL'] != 'MOESI_CMP_token':
panic("This script requires the MOESI_CMP_token protocol to be built.")
@@ -92,8 +92,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
cpu_seq = RubySequencer(version = i,
icache = l1i_cache,
dcache = l1d_cache,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
if piobus != None:
cpu_seq.pio_port = piobus.port
@@ -103,14 +103,17 @@ def create_system(options, phys_mem, piobus, dma_devices):
L1IcacheMemory = l1i_cache,
L1DcacheMemory = l1d_cache,
l2_select_num_bits = \
- math.log(options.num_l2caches, 2),
+ math.log(options.num_l2caches,
+ 2),
N_tokens = n_tokens,
- retry_threshold = options.l1_retries,
+ retry_threshold = \
+ options.l1_retries,
fixed_timeout_latency = \
options.timeout_latency,
dynamic_timeout_enabled = \
not options.disable_dyn_timeouts)
+ exec("system.l1_cntrl%d = l1_cntrl" % i)
#
# Add controllers and sequencers to the appropriate lists
#
@@ -128,9 +131,11 @@ def create_system(options, phys_mem, piobus, dma_devices):
L2cacheMemory = l2_cache,
N_tokens = n_tokens)
+ exec("system.l2_cntrl%d = l2_cntrl" % i)
l2_cntrl_nodes.append(l2_cntrl)
- phys_mem_size = long(phys_mem.range.second) - long(phys_mem.range.first) + 1
+ phys_mem_size = long(system.physmem.range.second) - \
+ long(system.physmem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
@@ -146,11 +151,14 @@ def create_system(options, phys_mem, piobus, dma_devices):
dir_cntrl = Directory_Controller(version = i,
directory = \
RubyDirectoryMemory(version = i,
- size = dir_size),
+ size = \
+ dir_size),
memBuffer = mem_cntrl,
l2_select_num_bits = \
- math.log(options.num_l2caches, 2))
+ math.log(options.num_l2caches,
+ 2))
+ exec("system.dir_cntrl%d = dir_cntrl" % i)
dir_cntrl_nodes.append(dir_cntrl)
for i, dma_device in enumerate(dma_devices):
@@ -158,12 +166,13 @@ def create_system(options, phys_mem, piobus, dma_devices):
# Create the Ruby objects associated with the dma controller
#
dma_seq = DMASequencer(version = i,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq)
+ exec("system.dma_cntrl%d = dma_cntrl" % i)
dma_cntrl.dma_sequencer.port = dma_device.dma
dma_cntrl_nodes.append(dma_cntrl)
diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py
index 705b569ac..45b08a288 100644
--- a/configs/ruby/MOESI_hammer.py
+++ b/configs/ruby/MOESI_hammer.py
@@ -46,7 +46,7 @@ class L2Cache(RubyCache):
def define_options(parser):
return
-def create_system(options, phys_mem, piobus, dma_devices):
+def create_system(options, system, piobus, dma_devices):
if buildEnv['PROTOCOL'] != 'MOESI_hammer':
panic("This script requires the MOESI_hammer protocol to be built.")
@@ -81,8 +81,8 @@ def create_system(options, phys_mem, piobus, dma_devices):
cpu_seq = RubySequencer(version = i,
icache = l1i_cache,
dcache = l1d_cache,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
if piobus != None:
cpu_seq.pio_port = piobus.port
@@ -92,13 +92,16 @@ def create_system(options, phys_mem, piobus, dma_devices):
L1IcacheMemory = l1i_cache,
L1DcacheMemory = l1d_cache,
L2cacheMemory = l2_cache)
+
+ exec("system.l1_cntrl%d = l1_cntrl" % i)
#
# Add controllers and sequencers to the appropriate lists
#
cpu_sequencers.append(cpu_seq)
l1_cntrl_nodes.append(l1_cntrl)
- phys_mem_size = long(phys_mem.range.second) - long(phys_mem.range.first) + 1
+ phys_mem_size = long(system.physmem.range.second) - \
+ long(system.physmem.range.first) + 1
mem_module_size = phys_mem_size / options.num_dirs
for i in xrange(options.num_dirs):
@@ -113,12 +116,15 @@ def create_system(options, phys_mem, piobus, dma_devices):
dir_cntrl = Directory_Controller(version = i,
directory = \
- RubyDirectoryMemory(version = i,
- size = dir_size,
- use_map = options.use_map,
- map_levels = options.map_levels),
+ RubyDirectoryMemory( \
+ version = i,
+ size = dir_size,
+ use_map = options.use_map,
+ map_levels = \
+ options.map_levels),
memBuffer = mem_cntrl)
+ exec("system.dir_cntrl%d = dir_cntrl" % i)
dir_cntrl_nodes.append(dir_cntrl)
for i, dma_device in enumerate(dma_devices):
@@ -126,12 +132,13 @@ def create_system(options, phys_mem, piobus, dma_devices):
# Create the Ruby objects associated with the dma controller
#
dma_seq = DMASequencer(version = i,
- physMemPort = phys_mem.port,
- physmem = phys_mem)
+ physMemPort = system.physmem.port,
+ physmem = system.physmem)
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq)
+ exec("system.dma_cntrl%d = dma_cntrl" % i)
dma_cntrl.dma_sequencer.port = dma_device.dma
dma_cntrl_nodes.append(dma_cntrl)
diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 77c975842..2e46dd352 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -52,13 +52,13 @@ def define_options(parser):
exec "import %s" % protocol
eval("%s.define_options(parser)" % protocol)
-def create_system(options, physmem, piobus = None, dma_devices = []):
+def create_system(options, system, piobus = None, dma_devices = []):
protocol = buildEnv['PROTOCOL']
exec "import %s" % protocol
try:
(cpu_sequencers, dir_cntrls, all_cntrls) = \
- eval("%s.create_system(options, physmem, piobus, dma_devices)" \
+ eval("%s.create_system(options, system, piobus, dma_devices)" \
% protocol)
except:
print "Error: could not create sytem for ruby protocol %s" % protocol
@@ -91,7 +91,8 @@ def create_system(options, physmem, piobus = None, dma_devices = []):
total_mem_size = MemorySize('0B')
for dir_cntrl in dir_cntrls:
total_mem_size.value += dir_cntrl.directory.size.value
- physmem_size = long(physmem.range.second) - long(physmem.range.first) + 1
+ physmem_size = long(system.physmem.range.second) - \
+ long(system.physmem.range.first) + 1
assert(total_mem_size.value == physmem_size)
ruby_profiler = RubyProfiler(num_of_sequencers = len(cpu_sequencers))
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-18 11:50:55 +0000