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-rwxr-xr-xarch/isa_parser.py7
-rw-r--r--arch/mips/isa_traits.hh6
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/isa_parser.py b/arch/isa_parser.py
index 83620a9f1..a92c85c3f 100755
--- a/arch/isa_parser.py
+++ b/arch/isa_parser.py
@@ -1226,6 +1226,10 @@ class FloatRegOperand(Operand):
width = 64;
else:
func = 'readFloatRegBits'
+ if (self.ctype == 'uint32_t'):
+ width = 32;
+ elif (self.ctype == 'uint64_t'):
+ width = 64;
if (self.size != self.dflt_size):
bit_select = 1
if width:
@@ -1251,6 +1255,9 @@ class FloatRegOperand(Operand):
elif (self.ctype == 'double'):
width = 64
func = 'setFloatReg'
+ elif (self.ctype == 'uint32_t'):
+ func = 'setFloatRegBits'
+ width = 32
elif (self.ctype == 'uint64_t'):
func = 'setFloatRegBits'
width = 64
diff --git a/arch/mips/isa_traits.hh b/arch/mips/isa_traits.hh
index 671d36b87..105d4c283 100644
--- a/arch/mips/isa_traits.hh
+++ b/arch/mips/isa_traits.hh
@@ -226,14 +226,20 @@ namespace MipsISA
double readReg(int floatReg, int width)
{
+ using namespace std;
+
switch(width)
{
case SingleWidth:
void *float_ptr = &regs[floatReg];
+ cout << "reading as float, reg." << floatReg << ": " << *(float *) float_ptr << endl;
+ cout << "reading as uint32_t, reg." << floatReg << ": " << *(uint32_t *) float_ptr << endl;
return *(float *) float_ptr;
case DoubleWidth:
void *double_ptr = &regs[floatReg];
+ cout << "reading as double, reg." << floatReg <<": " << *(double *) double_ptr << endl;
+ cout << "reading as uint64_t, reg." << floatReg << hex << ": 0x" << *(uint64_t *) float_ptr << endl;
return *(double *) double_ptr;
default: