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-rw-r--r--configs/common/FSConfig.py3
-rw-r--r--configs/common/Simulation.py2
-rw-r--r--configs/example/fs.py3
-rw-r--r--configs/example/se.py7
4 files changed, 11 insertions, 4 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 05888b10b..7ba1b001c 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -72,7 +72,8 @@ def makeLinuxAlphaSystem(mem_mode, mdesc = None):
self.mem_mode = mem_mode
self.sim_console = SimConsole(listener=ConsoleListener(port=3456))
self.kernel = binary('vmlinux')
- self.pal = binary('ts_osfpal')
+## self.pal = binary('ts_osfpal')
+ self.pal = '/z/hsul/work/m5/alpha-system/palcode/ts_osfpal'
self.console = binary('console')
self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py
index a2d045a5e..5e9c1d339 100644
--- a/configs/common/Simulation.py
+++ b/configs/common/Simulation.py
@@ -30,7 +30,7 @@ from os import getcwd
import m5
from m5.objects import *
m5.AddToPath('../common')
-from Caches import *
+from Caches import L1Cache
def run(options, root, testsys):
if options.maxtick:
diff --git a/configs/example/fs.py b/configs/example/fs.py
index aefa26169..3ce463879 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -35,6 +35,7 @@ from FSConfig import *
from SysPaths import *
from Benchmarks import *
import Simulation
+from Caches import *
if not m5.build_env['FULL_SYSTEM']:
m5.panic("This script requires full-system mode (ALPHA_FS).")
@@ -104,7 +105,7 @@ test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
for i in xrange(np):
if options.caches and not options.standard_switch:
test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
- L2Cache(size = '64kB'))
+ L1Cache(size = '64kB'))
test_sys.cpu[i].connectMemPorts(test_sys.membus)
test_sys.cpu[i].mem = test_sys.physmem
diff --git a/configs/example/se.py b/configs/example/se.py
index 1afeaf391..83c2b1f8d 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -35,11 +35,16 @@ from m5.objects import *
import os, optparse, sys
m5.AddToPath('../common')
import Simulation
+from Caches import *
# Get paths we might need. It's expected this file is in m5/configs/example.
config_path = os.path.dirname(os.path.abspath(__file__))
config_root = os.path.dirname(config_path)
m5_root = os.path.dirname(config_root)
+print m5_root
+print config_path
+print config_root
+
parser = optparse.OptionParser()
@@ -111,7 +116,7 @@ system.physmem.port = system.membus.port
for i in xrange(np):
if options.caches and not options.standard_switch:
system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
- L2Cache(size = '64kB'))
+ L1Cache(size = '64kB'))
system.cpu[i].connectMemPorts(system.membus)
system.cpu[i].mem = system.physmem
system.cpu[i].workload = process