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-rw-r--r--src/arch/arm/isa.cc11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 954375374..7f0e0f42b 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -754,17 +754,6 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
miscRegName[misc_reg], newVal);
}
break;
- case MISCREG_CPACR_EL1:
- {
- const uint32_t ones = (uint32_t)(-1);
- CPACR cpacrMask = 0;
- cpacrMask.tta = ones;
- cpacrMask.fpen = ones;
- newVal &= cpacrMask;
- DPRINTF(MiscRegs, "Writing misc reg %s: %#x\n",
- miscRegName[misc_reg], newVal);
- }
- break;
case MISCREG_CPTR_EL2:
{
const uint32_t ones = (uint32_t)(-1);