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-rw-r--r--src/SConscript3
-rw-r--r--src/arch/alpha/isa/decoder.isa9
-rw-r--r--src/arch/alpha/isa/mem.isa75
-rw-r--r--src/arch/alpha/locked_mem.hh8
-rw-r--r--src/base/random.cc48
-rw-r--r--src/base/random.hh18
-rw-r--r--src/base/trace.cc288
-rw-r--r--src/base/trace.hh169
-rw-r--r--src/base/traceflags.py25
-rw-r--r--src/cpu/exetrace.cc14
-rw-r--r--src/cpu/exetrace.hh26
-rw-r--r--src/cpu/o3/commit_impl.hh3
-rw-r--r--src/cpu/simple/atomic.cc13
-rw-r--r--src/cpu/simple/base.cc4
-rw-r--r--src/cpu/simple/base.hh8
-rw-r--r--src/kern/linux/printk.cc61
-rw-r--r--src/kern/tru64/dump_mbuf.cc9
-rw-r--r--src/kern/tru64/printf.cc62
-rw-r--r--src/kern/tru64/tru64_events.cc9
-rw-r--r--src/python/SConscript2
-rw-r--r--src/python/m5/main.py42
-rw-r--r--src/python/m5/objects/Root.py3
-rw-r--r--src/python/swig/random.i55
-rw-r--r--src/python/swig/trace.i76
-rw-r--r--src/sim/main.cc5
25 files changed, 497 insertions, 538 deletions
diff --git a/src/SConscript b/src/SConscript
index 74bed9a7e..d6b4c6c8d 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -133,6 +133,8 @@ base_sources = Split('''
python/swig/debug_wrap.cc
python/swig/main_wrap.cc
python/swig/event_wrap.cc
+ python/swig/random_wrap.cc
+ python/swig/trace_wrap.cc
python/swig/pyevent.cc
sim/builder.cc
@@ -149,7 +151,6 @@ base_sources = Split('''
sim/stat_context.cc
sim/stat_control.cc
sim/system.cc
- sim/trace_context.cc
''')
trace_reader_sources = Split('''
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 6df47ef7a..1da6a60f1 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -84,6 +84,9 @@ decode OPCODE default Unknown::unknown() {
uint64_t tmp = write_result;
// see stq_c
Ra = (tmp == 0 || tmp == 1) ? tmp : Ra;
+ if (tmp == 1) {
+ xc->setStCondFailures(0);
+ }
}}, mem_flags = LOCKED, inst_flags = IsStoreConditional);
0x2f: stq_c({{ Mem.uq = Ra; }},
{{
@@ -96,6 +99,12 @@ decode OPCODE default Unknown::unknown() {
// mailbox access, and we don't update the
// result register at all.
Ra = (tmp == 0 || tmp == 1) ? tmp : Ra;
+ if (tmp == 1) {
+ // clear failure counter... this is
+ // non-architectural and for debugging
+ // only.
+ xc->setStCondFailures(0);
+ }
}}, mem_flags = LOCKED, inst_flags = IsStoreConditional);
}
diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa
index a82435a85..fe0daf772 100644
--- a/src/arch/alpha/isa/mem.isa
+++ b/src/arch/alpha/isa/mem.isa
@@ -350,6 +350,41 @@ def template StoreMemAccExecute {{
{
Addr EA;
Fault fault = NoFault;
+
+ %(fp_enable_check)s;
+ %(op_decl)s;
+ %(op_rd)s;
+ EA = xc->getEA();
+
+ if (fault == NoFault) {
+ %(memacc_code)s;
+ }
+
+ if (fault == NoFault) {
+ fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
+ memAccessFlags, NULL);
+ if (traceData) { traceData->setData(Mem); }
+ }
+
+ if (fault == NoFault) {
+ %(postacc_code)s;
+ }
+
+ if (fault == NoFault) {
+ %(op_wb)s;
+ }
+
+ return fault;
+ }
+}};
+
+def template StoreCondMemAccExecute {{
+ Fault
+ %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
+ {
+ Addr EA;
+ Fault fault = NoFault;
uint64_t write_result = 0;
%(fp_enable_check)s;
@@ -386,6 +421,40 @@ def template StoreExecute {{
{
Addr EA;
Fault fault = NoFault;
+
+ %(fp_enable_check)s;
+ %(op_decl)s;
+ %(op_rd)s;
+ %(ea_code)s;
+
+ if (fault == NoFault) {
+ %(memacc_code)s;
+ }
+
+ if (fault == NoFault) {
+ fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
+ memAccessFlags, NULL);
+ if (traceData) { traceData->setData(Mem); }
+ }
+
+ if (fault == NoFault) {
+ %(postacc_code)s;
+ }
+
+ if (fault == NoFault) {
+ %(op_wb)s;
+ }
+
+ return fault;
+ }
+}};
+
+def template StoreCondExecute {{
+ Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+ Trace::InstRecord *traceData) const
+ {
+ Addr EA;
+ Fault fault = NoFault;
uint64_t write_result = 0;
%(fp_enable_check)s;
@@ -614,10 +683,8 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
# select templates
- # define aliases... most StoreCond templates are the same as the
- # corresponding Store templates (only CompleteAcc is different).
- StoreCondMemAccExecute = StoreMemAccExecute
- StoreCondExecute = StoreExecute
+ # The InitiateAcc template is the same for StoreCond templates as the
+ # corresponding Store template..
StoreCondInitiateAcc = StoreInitiateAcc
memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
diff --git a/src/arch/alpha/locked_mem.hh b/src/arch/alpha/locked_mem.hh
index 44b002c6c..56b5ba5ed 100644
--- a/src/arch/alpha/locked_mem.hh
+++ b/src/arch/alpha/locked_mem.hh
@@ -35,6 +35,14 @@
* @file
*
* ISA-specific helper functions for locked memory accesses.
+ *
+ * Note that these functions are not embedded in the ISA description
+ * because they operate on the *physical* address rather than the
+ * virtual address. In the current M5 design, the physical address is
+ * not accessible from the ISA description, only from the CPU model.
+ * Thus the CPU is responsible for calling back to the ISA (here)
+ * after the address translation has been performed to allow the ISA
+ * to do these manipulations based on the physical address.
*/
#include "arch/alpha/miscregfile.hh"
diff --git a/src/base/random.cc b/src/base/random.cc
index 0ccedcb00..ceab337d9 100644
--- a/src/base/random.cc
+++ b/src/base/random.cc
@@ -40,38 +40,20 @@
#include <cstdlib>
#include <cmath>
-
-#include "sim/param.hh"
#include "base/random.hh"
-#include "base/trace.hh"
using namespace std;
-class RandomContext : public ParamContext
-{
- public:
- RandomContext(const string &_iniSection)
- : ::ParamContext(_iniSection) {}
- ~RandomContext() {}
-
- void checkParams();
-};
-
-RandomContext paramContext("random");
-
-Param<unsigned>
-seed(&paramContext, "seed", "seed to random number generator", 1);
-
-void
-RandomContext::checkParams()
+uint32_t
+getInt32()
{
- ::srand48(seed);
+ return mrand48() & 0xffffffff;
}
-long
-getLong()
+double
+getDouble()
{
- return mrand48();
+ return drand48();
}
double
@@ -105,21 +87,3 @@ getUniformPos(uint64_t min, uint64_t max)
return (uint64_t)m5round(r);
}
-
-
-// idea for generating a double from erand48
-double
-getDouble()
-{
- union {
- uint32_t _long[2];
- uint16_t _short[4];
- };
-
- _long[0] = mrand48();
- _long[1] = mrand48();
-
- return ldexp((double) _short[0], -48) +
- ldexp((double) _short[1], -32) +
- ldexp((double) _short[2], -16);
-}
diff --git a/src/base/random.hh b/src/base/random.hh
index 40d62da7f..0cd88728d 100644
--- a/src/base/random.hh
+++ b/src/base/random.hh
@@ -34,7 +34,7 @@
#include "sim/host.hh"
-long getLong();
+uint32_t getUInt32();
double getDouble();
double m5random(double r);
uint64_t getUniformPos(uint64_t min, uint64_t max);
@@ -46,7 +46,7 @@ struct Random;
template<> struct Random<int8_t>
{
static int8_t get()
- { return getLong() & (int8_t)-1; }
+ { return getUInt32() & (int8_t)-1; }
static int8_t uniform(int8_t min, int8_t max)
{ return getUniform(min, max); }
@@ -55,7 +55,7 @@ template<> struct Random<int8_t>
template<> struct Random<uint8_t>
{
static uint8_t get()
- { return getLong() & (uint8_t)-1; }
+ { return getUInt32() & (uint8_t)-1; }
static uint8_t uniform(uint8_t min, uint8_t max)
{ return getUniformPos(min, max); }
@@ -64,7 +64,7 @@ template<> struct Random<uint8_t>
template<> struct Random<int16_t>
{
static int16_t get()
- { return getLong() & (int16_t)-1; }
+ { return getUInt32() & (int16_t)-1; }
static int16_t uniform(int16_t min, int16_t max)
{ return getUniform(min, max); }
@@ -73,7 +73,7 @@ template<> struct Random<int16_t>
template<> struct Random<uint16_t>
{
static uint16_t get()
- { return getLong() & (uint16_t)-1; }
+ { return getUInt32() & (uint16_t)-1; }
static uint16_t uniform(uint16_t min, uint16_t max)
{ return getUniformPos(min, max); }
@@ -82,7 +82,7 @@ template<> struct Random<uint16_t>
template<> struct Random<int32_t>
{
static int32_t get()
- { return (int32_t)getLong(); }
+ { return (int32_t)getUInt32(); }
static int32_t uniform(int32_t min, int32_t max)
{ return getUniform(min, max); }
@@ -91,7 +91,7 @@ template<> struct Random<int32_t>
template<> struct Random<uint32_t>
{
static uint32_t get()
- { return (uint32_t)getLong(); }
+ { return (uint32_t)getUInt32(); }
static uint32_t uniform(uint32_t min, uint32_t max)
{ return getUniformPos(min, max); }
@@ -100,7 +100,7 @@ template<> struct Random<uint32_t>
template<> struct Random<int64_t>
{
static int64_t get()
- { return (int64_t)getLong() << 32 || (uint64_t)getLong(); }
+ { return (int64_t)getUInt32() << 32 || (uint64_t)getUInt32(); }
static int64_t uniform(int64_t min, int64_t max)
{ return getUniform(min, max); }
@@ -109,7 +109,7 @@ template<> struct Random<int64_t>
template<> struct Random<uint64_t>
{
static uint64_t get()
- { return (uint64_t)getLong() << 32 || (uint64_t)getLong(); }
+ { return (uint64_t)getUInt32() << 32 || (uint64_t)getUInt32(); }
static uint64_t uniform(uint64_t min, uint64_t max)
{ return getUniformPos(min, max); }
diff --git a/src/base/trace.cc b/src/base/trace.cc
index 6e9838456..7afb038be 100644
--- a/src/base/trace.cc
+++ b/src/base/trace.cc
@@ -37,8 +37,9 @@
#include <vector>
#include "base/misc.hh"
-#include "base/trace.hh"
+#include "base/output.hh"
#include "base/str.hh"
+#include "base/trace.hh"
#include "base/varargs.hh"
using namespace std;
@@ -46,6 +47,7 @@ using namespace std;
namespace Trace {
const string DefaultName("global");
FlagVec flags(NumFlags, false);
+bool enabled = true;
//
// This variable holds the output stream for debug information. Other
@@ -54,149 +56,74 @@ FlagVec flags(NumFlags, false);
// output.
//
ostream *dprintf_stream = &cerr;
-
-ObjectMatch ignore;
-
-Log theLog;
-
-Log::Log()
+ostream &
+output()
{
- size = 0;
- buffer = NULL;
+ return *dprintf_stream;
}
-
void
-Log::init(int _size)
+setOutput(const string &filename)
{
- if (buffer != NULL) {
- fatal("Trace::Log::init called twice!");
- }
-
- size = _size;
-
- buffer = new Record *[size];
-
- for (int i = 0; i < size; ++i) {
- buffer[i] = NULL;
- }
-
- nextRecPtr = &buffer[0];
- wrapRecPtr = &buffer[size];
+ dprintf_stream = simout.find(filename);
}
+ObjectMatch ignore;
-Log::~Log()
+void
+dprintf(Tick when, const std::string &name, const char *format,
+ CPRINTF_DEFINITION)
{
- for (int i = 0; i < size; ++i) {
- delete buffer[i];
- }
-
- delete [] buffer;
-}
+ if (!name.empty() && ignore.match(name))
+ return;
+ std::ostream &os = *dprintf_stream;
-void
-Log::append(Record *rec)
-{
- // dump record to output stream if there's one open
- if (dprintf_stream != NULL) {
- rec->dump(*dprintf_stream);
- } else {
- rec->dump(cout);
- }
+ string fmt = "";
+ CPrintfArgsList args(VARARGS_ALLARGS);
- // no buffering: justget rid of it now
- if (buffer == NULL) {
- delete rec;
- return;
+ if (!name.empty()) {
+ fmt = "%s: " + fmt;
+ args.push_front(name);
}
- Record *oldRec = *nextRecPtr;
-
- if (oldRec != NULL) {
- // log has wrapped: overwrite
- delete oldRec;
+ if (when != (Tick)-1) {
+ fmt = "%7d: " + fmt;
+ args.push_front(when);
}
- *nextRecPtr = rec;
+ fmt += format;
- if (++nextRecPtr == wrapRecPtr) {
- nextRecPtr = &buffer[0];
- }
+ ccprintf(os, fmt.c_str(), args);
+ os.flush();
}
-
void
-Log::dump(ostream &os)
+dump(Tick when, const std::string &name, const void *d, int len)
{
- if (buffer == NULL) {
+ if (!name.empty() && ignore.match(name))
return;
- }
- Record **bufPtr = nextRecPtr;
-
- if (*bufPtr == NULL) {
- // next record slot is empty: log must not be full yet.
- // start dumping from beginning of buffer
- bufPtr = buffer;
- }
+ std::ostream &os = *dprintf_stream;
- do {
- Record *rec = *bufPtr;
-
- rec->dump(os);
-
- if (++bufPtr == wrapRecPtr) {
- bufPtr = &buffer[0];
- }
- } while (bufPtr != nextRecPtr);
-}
-
-PrintfRecord::~PrintfRecord()
-{}
-
-void
-PrintfRecord::dump(ostream &os)
-{
string fmt = "";
+ CPrintfArgsList args;
if (!name.empty()) {
fmt = "%s: " + fmt;
args.push_front(name);
}
- if (cycle != (Tick)-1) {
+ if (when != (Tick)-1) {
fmt = "%7d: " + fmt;
- args.push_front(cycle);
+ args.push_front(when);
}
- fmt += format;
-
- ccprintf(os, fmt.c_str(), args);
- os.flush();
-}
-
-DataRecord::DataRecord(Tick _cycle, const string &_name,
- const void *_data, int _len)
- : Record(_cycle), name(_name), len(_len)
-{
- data = new uint8_t[len];
- memcpy(data, _data, len);
-}
-
-DataRecord::~DataRecord()
-{
- delete [] data;
-}
-
-void
-DataRecord::dump(ostream &os)
-{
+ const char *data = static_cast<const char *>(d);
int c, i, j;
-
for (i = 0; i < len; i += 16) {
- ccprintf(os, "%d: %s: %08x ", cycle, name, i);
+ ccprintf(os, fmt, args);
+ ccprintf(os, "%08x ", i);
c = len - i;
if (c > 16) c = 16;
@@ -212,8 +139,7 @@ DataRecord::dump(ostream &os)
for (j = 0; j < c; j++) {
int ch = data[i + j] & 0x7f;
- ccprintf(os,
- "%c", (char)(isprint(ch) ? ch : ' '));
+ ccprintf(os, "%c", (char)(isprint(ch) ? ch : ' '));
}
ccprintf(os, "\n");
@@ -222,126 +148,66 @@ DataRecord::dump(ostream &os)
break;
}
}
-} // namespace Trace
-//
-// Returns the current output stream for debug information. As a
-// wrapper around Trace::dprintf_stream, this handles cases where debug
-// information is generated in the process of parsing .ini options,
-// before we process the option that sets up the debug output stream
-// itself.
-//
-std::ostream &
-DebugOut()
-{
- return *Trace::dprintf_stream;
-}
-
-/////////////////////////////////////////////
-//
-// C-linkage functions for invoking from gdb
-//
-/////////////////////////////////////////////
-
-//
-// Dump trace buffer to specified file (cout if NULL)
-//
-void
-dumpTrace(const char *filename)
-{
- if (filename != NULL) {
- ofstream out(filename);
- Trace::theLog.dump(out);
- out.close();
- }
- else {
- Trace::theLog.dump(cout);
- }
-}
-
-
-//
-// Turn on/off trace output to cerr. Typically used when trace output
-// is only going to circular buffer, but you want to see what's being
-// sent there as you step through some code in gdb. This uses the
-// same facility as the "trace to file" feature, and will print error
-// messages rather than clobbering an existing ostream pointer.
-//
-void
-echoTrace(bool on)
-{
- if (on) {
- if (Trace::dprintf_stream != NULL) {
- cerr << "Already echoing trace to a file... go do a 'tail -f'"
- << " on that file instead." << endl;
- } else {
- Trace::dprintf_stream = &cerr;
- }
- } else {
- if (Trace::dprintf_stream != &cerr) {
- cerr << "Not echoing trace to cerr." << endl;
- } else {
- Trace::dprintf_stream = NULL;
- }
- }
-}
-
-void
-printTraceFlags()
-{
- using namespace Trace;
- for (int i = 0; i < numFlagStrings; ++i)
- if (flags[i])
- cprintf("%s\n", flagStrings[i]);
-}
-
-void
-tweakTraceFlag(const char *string, bool value)
+bool
+changeFlag(const char *s, bool value)
{
using namespace Trace;
- std::string str(string);
+ std::string str(s);
for (int i = 0; i < numFlagStrings; ++i) {
if (str != flagStrings[i])
continue;
- int idx = i;
-
- if (idx < NumFlags) {
- flags[idx] = value;
+ if (i < NumFlags) {
+ flags[i] = value;
} else {
- idx -= NumFlags;
- if (idx >= NumCompoundFlags) {
- ccprintf(cerr, "Invalid compound flag");
- return;
- }
-
- const Flags *flagVec = compoundFlags[idx];
+ i -= NumFlags;
+ const Flags *flagVec = compoundFlags[i];
for (int j = 0; flagVec[j] != -1; ++j) {
- if (flagVec[j] >= NumFlags) {
- ccprintf(cerr, "Invalid compound flag");
- return;
- }
- flags[flagVec[j]] = value;
+ if (flagVec[j] < NumFlags)
+ flags[flagVec[j]] = value;
}
}
- cprintf("flag %s was %s\n", string, value ? "set" : "cleared");
- return;
+ return true;
}
- cprintf("could not find flag %s\n", string);
+ // the flag was not found.
+ return false;
}
void
-setTraceFlag(const char *string)
+dumpStatus()
{
- tweakTraceFlag(string, true);
+ using namespace Trace;
+ for (int i = 0; i < numFlagStrings; ++i) {
+ if (flags[i])
+ cprintf("%s\n", flagStrings[i]);
+ }
}
-void
-clearTraceFlag(const char *string)
-{
- tweakTraceFlag(string, false);
-}
+/* namespace Trace */ }
+
+
+// add a set of functions that can easily be invoked from gdb
+extern "C" {
+ void
+ setTraceFlag(const char *string)
+ {
+ Trace::changeFlag(string, true);
+ }
+
+ void
+ clearTraceFlag(const char *string)
+ {
+ Trace::changeFlag(string, false);
+ }
+
+ void
+ dumpTraceStatus()
+ {
+ Trace::dumpStatus();
+ }
+/* extern "C" */ }
diff --git a/src/base/trace.hh b/src/base/trace.hh
index 55dd1bd4e..8e380d8e1 100644
--- a/src/base/trace.hh
+++ b/src/base/trace.hh
@@ -32,131 +32,35 @@
#ifndef __BASE_TRACE_HH__
#define __BASE_TRACE_HH__
+#include <string>
#include <vector>
#include "base/cprintf.hh"
#include "base/match.hh"
+#include "base/traceflags.hh"
#include "sim/host.hh"
#include "sim/root.hh"
-#include "base/traceflags.hh"
-
namespace Trace {
- typedef std::vector<bool> FlagVec;
-
- extern FlagVec flags;
+std::ostream &output();
+void setOutput(const std::string &filename);
-#if TRACING_ON
- const bool On = true;
-#else
- const bool On = false;
-#endif
-
- inline bool
- IsOn(int t)
- {
- return flags[t];
-
- }
-
- void dump(const uint8_t *data, int count);
-
- class Record
- {
- protected:
- Tick cycle;
-
- Record(Tick _cycle)
- : cycle(_cycle)
- {
- }
-
- public:
- virtual ~Record() {}
-
- virtual void dump(std::ostream &) = 0;
- };
-
- class PrintfRecord : public Record
- {
- private:
- const std::string &name;
- const char *format;
- CPrintfArgsList args;
-
- public:
- PrintfRecord(Tick cycle, const std::string &_name, const char *_format,
- CPRINTF_DECLARATION)
- : Record(cycle), name(_name), format(_format),
- args(VARARGS_ALLARGS)
- {
- }
-
- virtual ~PrintfRecord();
-
- virtual void dump(std::ostream &);
- };
-
- class DataRecord : public Record
- {
- private:
- const std::string &name;
- uint8_t *data;
- int len;
-
- public:
- DataRecord(Tick cycle, const std::string &name,
- const void *_data, int _len);
- virtual ~DataRecord();
-
- virtual void dump(std::ostream &);
- };
-
- class Log
- {
- private:
- int size; // number of records in log
- Record **buffer; // array of 'size' Record ptrs (circular buf)
- Record **nextRecPtr; // next slot to use in buffer
- Record **wrapRecPtr; // &buffer[size], for quick wrap check
-
- public:
- Log();
- ~Log();
-
- void init(int _size);
-
- void append(Record *); // append trace record to log
- void dump(std::ostream &); // dump contents to stream
- };
-
- extern Log theLog;
-
- extern ObjectMatch ignore;
-
- inline void
- dprintf(Tick when, const std::string &name, const char *format,
- CPRINTF_DECLARATION)
- {
- if (!name.empty() && ignore.match(name))
- return;
-
- theLog.append(new Trace::PrintfRecord(when, name, format,
- VARARGS_ALLARGS));
- }
-
- inline void
- dataDump(Tick when, const std::string &name, const void *data, int len)
- {
- theLog.append(new Trace::DataRecord(when, name, data, len));
- }
+extern bool enabled;
+typedef std::vector<bool> FlagVec;
+extern FlagVec flags;
+inline bool IsOn(int t) { return flags[t]; }
+bool changeFlag(const char *str, bool value);
+void dumpStatus();
- extern const std::string DefaultName;
+extern ObjectMatch ignore;
+extern const std::string DefaultName;
-};
+void dprintf(Tick when, const std::string &name, const char *format,
+ CPRINTF_DECLARATION);
+void dump(Tick when, const std::string &name, const void *data, int len);
-std::ostream &DebugOut();
+/* namespace Trace */ }
// This silly little class allows us to wrap a string in a functor
// object so that we can give a name() that DPRINTF will like
@@ -181,39 +85,44 @@ inline const std::string &name() { return Trace::DefaultName; }
#if TRACING_ON
-#define DTRACE(x) (Trace::IsOn(Trace::x))
+#define DTRACE(x) (Trace::IsOn(Trace::x) && Trace::enabled)
+
+#define DDUMP(x, data, count) do { \
+ if (DTRACE(x)) \
+ Trace::dump(curTick, name(), data, count); \
+} while (0)
-#define DDUMP(x, data, count) do { \
- if (DTRACE(x)) \
- Trace::dataDump(curTick, name(), data, count); \
+#define DPRINTF(x, ...) do { \
+ if (DTRACE(x)) \
+ Trace::dprintf(curTick, name(), __VA_ARGS__); \
} while (0)
-#define DPRINTF(x, args...) do { \
- if (DTRACE(x)) \
- Trace::dprintf(curTick, name(), args); \
+#define DPRINTFR(x, ...) do { \
+ if (DTRACE(x)) \
+ Trace::dprintf((Tick)-1, std::string(), __VA_ARGS__); \
} while (0)
-#define DPRINTFR(x, args...) do { \
- if (DTRACE(x)) \
- Trace::dprintf((Tick)-1, std::string(), args); \
+#define DDUMPN(data, count) do { \
+ Trace::dump(curTick, name(), data, count); \
} while (0)
-#define DPRINTFN(args...) do { \
- Trace::dprintf(curTick, name(), args); \
+#define DPRINTFN(...) do { \
+ Trace::dprintf(curTick, name(), __VA_ARGS__); \
} while (0)
-#define DPRINTFNR(args...) do { \
- Trace::dprintf((Tick)-1, string(), args); \
+#define DPRINTFNR(...) do { \
+ Trace::dprintf((Tick)-1, string(), __VA_ARGS__); \
} while (0)
#else // !TRACING_ON
#define DTRACE(x) (false)
-#define DPRINTF(x, args...) do {} while (0)
-#define DPRINTFR(args...) do {} while (0)
-#define DPRINTFN(args...) do {} while (0)
-#define DPRINTFNR(args...) do {} while (0)
#define DDUMP(x, data, count) do {} while (0)
+#define DPRINTF(x, ...) do {} while (0)
+#define DPRINTFR(...) do {} while (0)
+#define DDUMPN(data, count) do {} while (0)
+#define DPRINTFN(...) do {} while (0)
+#define DPRINTFNR(...) do {} while (0)
#endif // TRACING_ON
diff --git a/src/base/traceflags.py b/src/base/traceflags.py
index c06399f81..800c24dee 100644
--- a/src/base/traceflags.py
+++ b/src/base/traceflags.py
@@ -178,15 +178,22 @@ baseFlags = [
# following the existing examples.
#
compoundFlagMap = {
- 'GDBAll' : [ 'GDBMisc', 'GDBAcc', 'GDBRead', 'GDBWrite', 'GDBSend', 'GDBRecv', 'GDBExtra' ],
- 'ScsiAll' : [ 'ScsiDisk', 'ScsiCtrl', 'ScsiNone' ],
- 'DiskImageAll' : [ 'DiskImage', 'DiskImageRead', 'DiskImageWrite' ],
- 'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
- 'EthernetNoData' : [ 'Ethernet', 'EthernetPIO', 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
- 'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ],
- 'O3CPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ', 'ROB', 'FreeList', 'RenameMap', 'LSQ', 'LSQUnit', 'StoreSet', 'MemDepUnit', 'DynInst', 'FullCPU', 'O3CPU', 'Activity','Scoreboard','Writeback'],
- 'OzoneCPUAll' : [ 'BE', 'FE', 'IBE', 'OzoneLSQ', 'OzoneCPU'],
- 'All' : baseFlags
+ 'All' : baseFlags,
+ 'DiskImageAll' : [ 'DiskImage', 'DiskImageRead', 'DiskImageWrite' ],
+ 'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
+ 'EthernetData' , 'EthernetDesc', 'EthernetIntr',
+ 'EthernetSM', 'EthernetCksum' ],
+ 'EthernetNoData' : [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
+ 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
+ 'GDBAll' : [ 'GDBMisc', 'GDBAcc', 'GDBRead', 'GDBWrite', 'GDBSend',
+ 'GDBRecv', 'GDBExtra' ],
+ 'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ],
+ 'O3CPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ',
+ 'ROB', 'FreeList', 'RenameMap', 'LSQ', 'LSQUnit',
+ 'StoreSet', 'MemDepUnit', 'DynInst', 'FullCPU',
+ 'O3CPU', 'Activity','Scoreboard','Writeback' ],
+ 'OzoneCPUAll' : [ 'BE', 'FE', 'IBE', 'OzoneLSQ', 'OzoneCPU' ],
+ 'ScsiAll' : [ 'ScsiDisk', 'ScsiCtrl', 'ScsiNone' ]
}
#############################################################
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index 5108d7338..683cb138e 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -123,8 +123,10 @@ inline void printLevelHeader(ostream & os, int level)
#endif
void
-Trace::InstRecord::dump(ostream &outs)
+Trace::InstRecord::dump()
{
+ ostream &outs = Trace::output();
+
DPRINTF(Sparc, "Instruction: %#X\n", staticInst->machInst);
if (flags[PRINT_REG_DELTA])
{
@@ -194,7 +196,7 @@ Trace::InstRecord::dump(ostream &outs)
bool is_trace_system = true;
#endif
if (is_trace_system) {
- ccprintf(outs, "%7d ) ", cycle);
+ ccprintf(outs, "%7d ) ", when);
outs << "0x" << hex << PC << ":\t";
if (staticInst->isLoad()) {
outs << "<RD 0x" << hex << addr;
@@ -206,8 +208,8 @@ Trace::InstRecord::dump(ostream &outs)
outs << endl;
}
} else {
- if (flags[PRINT_CYCLE])
- ccprintf(outs, "%7d: ", cycle);
+ if (flags[PRINT_TICKS])
+ ccprintf(outs, "%7d: ", when);
outs << thread->getCpuPtr()->name() << " ";
@@ -324,7 +326,7 @@ Trace::InstRecord::dump(ostream &outs)
// We took a trap on a micro-op...
if (wasMicro && !staticInst->isMicroOp())
{
- // let's skip comparing this cycle
+ // let's skip comparing this tick
while (!compared)
if (shared_data->flags == OWN_M5) {
shared_data->flags = OWN_LEGION;
@@ -748,7 +750,7 @@ Trace::InstRecord::setParams()
{
flags[TRACE_MISSPEC] = exe_trace_spec;
- flags[PRINT_CYCLE] = exe_trace_print_cycle;
+ flags[PRINT_TICKS] = exe_trace_print_cycle;
flags[PRINT_OP_CLASS] = exe_trace_print_opclass;
flags[PRINT_THREAD_NUM] = exe_trace_print_thread;
flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh
index a825f6a82..95a142f3c 100644
--- a/src/cpu/exetrace.hh
+++ b/src/cpu/exetrace.hh
@@ -36,22 +36,24 @@
#include <fstream>
#include <vector>
-#include "sim/host.hh"
-#include "cpu/inst_seq.hh" // for InstSeqNum
#include "base/trace.hh"
-#include "cpu/thread_context.hh"
+#include "cpu/inst_seq.hh" // for InstSeqNum
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
+#include "sim/host.hh"
class ThreadContext;
namespace Trace {
-class InstRecord : public Record
+class InstRecord
{
protected:
typedef TheISA::IntRegFile IntRegFile;
+ Tick when;
+
// The following fields are initialized by the constructor and
// thus guaranteed to be valid.
ThreadContext *thread;
@@ -95,10 +97,10 @@ class InstRecord : public Record
bool regs_valid;
public:
- InstRecord(Tick _cycle, ThreadContext *_thread,
+ InstRecord(Tick _when, ThreadContext *_thread,
const StaticInstPtr &_staticInst,
Addr _pc, bool spec)
- : Record(_cycle), thread(_thread),
+ : when(_when), thread(_thread),
staticInst(_staticInst), PC(_pc),
misspeculating(spec)
{
@@ -110,9 +112,7 @@ class InstRecord : public Record
cp_seq_valid = false;
}
- virtual ~InstRecord() { }
-
- virtual void dump(std::ostream &outs);
+ ~InstRecord() { }
void setAddr(Addr a) { addr = a; addr_valid = true; }
@@ -136,11 +136,11 @@ class InstRecord : public Record
void setRegs(const IntRegFile &regs);
- void finalize() { theLog.append(this); }
+ void dump();
enum InstExecFlagBits {
TRACE_MISSPEC = 0,
- PRINT_CYCLE,
+ PRINT_TICKS,
PRINT_OP_CLASS,
PRINT_THREAD_NUM,
PRINT_RESULT_DATA,
@@ -176,13 +176,13 @@ InstRecord::setRegs(const IntRegFile &regs)
inline
InstRecord *
-getInstRecord(Tick cycle, ThreadContext *tc,
+getInstRecord(Tick when, ThreadContext *tc,
const StaticInstPtr staticInst,
Addr pc)
{
if (DTRACE(InstExec) &&
(InstRecord::traceMisspec() || !tc->misspeculating())) {
- return new InstRecord(cycle, tc, staticInst, pc,
+ return new InstRecord(when, tc, staticInst, pc,
tc->misspeculating());
}
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index f1457922c..18fb2aaa3 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1106,7 +1106,8 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
if (head_inst->traceData) {
head_inst->traceData->setFetchSeq(head_inst->seqNum);
head_inst->traceData->setCPSeq(thread[tid]->numInst);
- head_inst->traceData->finalize();
+ head_inst->traceData->dump();
+ delete head_inst->traceData;
head_inst->traceData = NULL;
}
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 6904ed936..072867536 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -421,17 +421,8 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
if (req->isSwap()) {
assert(res);
*res = pkt->get<T>();
- }
-
- if (req->isLocked()) {
- uint64_t scResult = req->getExtraData();
- if (scResult != 0) {
- // clear failure counter
- thread->setStCondFailures(0);
- }
- if (res) {
- *res = req->getExtraData();
- }
+ } else if (res) {
+ *res = req->getScResult();
}
}
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index b8d1f3bed..80b137909 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -427,7 +427,9 @@ BaseSimpleCPU::postExecute()
traceFunctions(thread->readPC());
if (traceData) {
- traceData->finalize();
+ traceData->dump();
+ delete traceData;
+ traceData = NULL;
}
}
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index b7d93c702..01c8e8eb7 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -329,6 +329,14 @@ class BaseSimpleCPU : public BaseCPU
return thread->setMiscRegWithEffect(reg_idx, val);
}
+ unsigned readStCondFailures() {
+ return thread->readStCondFailures();
+ }
+
+ void setStCondFailures(unsigned sc_failures) {
+ thread->setStCondFailures(sc_failures);
+ }
+
#if FULL_SYSTEM
Fault hwrei() { return thread->hwrei(); }
void ev5_trap(Fault fault) { fault->invoke(tc); }
diff --git a/src/kern/linux/printk.cc b/src/kern/linux/printk.cc
index ea3d59f19..0e9fd6620 100644
--- a/src/kern/linux/printk.cc
+++ b/src/kern/linux/printk.cc
@@ -41,11 +41,12 @@ using namespace std;
void
Printk(TheISA::Arguments args)
{
+ std::ostream &out = Trace::output();
char *p = (char *)args++;
- ios::fmtflags saved_flags = DebugOut().flags();
- char old_fill = DebugOut().fill();
- int old_precision = DebugOut().precision();
+ ios::fmtflags saved_flags = out.flags();
+ char old_fill = out.fill();
+ int old_precision = out.precision();
while (*p) {
switch (*p) {
@@ -118,53 +119,53 @@ Printk(TheISA::Arguments args)
case 'P':
case 'p': {
if (hexnum)
- DebugOut() << hex;
+ out << hex;
if (octal)
- DebugOut() << oct;
+ out << oct;
if (format) {
if (!zero)
- DebugOut().setf(ios::showbase);
+ out.setf(ios::showbase);
else {
if (hexnum) {
- DebugOut() << "0x";
+ out << "0x";
width -= 2;
} else if (octal) {
- DebugOut() << "0";
+ out << "0";
width -= 1;
}
}
}
if (zero)
- DebugOut().fill('0');
+ out.fill('0');
if (width > 0)
- DebugOut().width(width);
+ out.width(width);
if (leftjustify && !zero)
- DebugOut().setf(ios::left);
+ out.setf(ios::left);
if (sign) {
if (islong)
- DebugOut() << (int64_t)args;
+ out << (int64_t)args;
else
- DebugOut() << (int32_t)args;
+ out << (int32_t)args;
} else {
if (islong)
- DebugOut() << (uint64_t)args;
+ out << (uint64_t)args;
else
- DebugOut() << (uint32_t)args;
+ out << (uint32_t)args;
}
if (zero)
- DebugOut().fill(' ');
+ out.fill(' ');
if (width > 0)
- DebugOut().width(0);
+ out.width(0);
- DebugOut() << dec;
+ out << dec;
++args;
}
@@ -176,11 +177,11 @@ Printk(TheISA::Arguments args)
s = "<NULL>";
if (width > 0)
- DebugOut().width(width);
+ out.width(width);
if (leftjustify)
- DebugOut().setf(ios::left);
+ out.setf(ios::left);
- DebugOut() << s;
+ out << s;
++args;
}
break;
@@ -201,7 +202,7 @@ Printk(TheISA::Arguments args)
while (width-- > 0) {
char c = (char)(num & mask);
if (c)
- DebugOut() << c;
+ out << c;
num >>= 8;
}
@@ -211,7 +212,7 @@ Printk(TheISA::Arguments args)
case 'b': {
uint64_t n = (uint64_t)args++;
char *s = (char *)args++;
- DebugOut() << s << ": " << n;
+ out << s << ": " << n;
}
break;
case 'n':
@@ -233,32 +234,32 @@ Printk(TheISA::Arguments args)
}
break;
case '%':
- DebugOut() << '%';
+ out << '%';
break;
}
++p;
}
break;
case '\n':
- DebugOut() << endl;
+ out << endl;
++p;
break;
case '\r':
++p;
if (*p != '\n')
- DebugOut() << endl;
+ out << endl;
break;
default: {
size_t len = strcspn(p, "%\n\r\0");
- DebugOut().write(p, len);
+ out.write(p, len);
p += len;
}
}
}
- DebugOut().flags(saved_flags);
- DebugOut().fill(old_fill);
- DebugOut().precision(old_precision);
+ out.flags(saved_flags);
+ out.fill(old_fill);
+ out.precision(old_precision);
}
diff --git a/src/kern/tru64/dump_mbuf.cc b/src/kern/tru64/dump_mbuf.cc
index 22d2228f0..5ccfbca5d 100644
--- a/src/kern/tru64/dump_mbuf.cc
+++ b/src/kern/tru64/dump_mbuf.cc
@@ -50,6 +50,7 @@ void
DumpMbuf(Arguments args)
{
ThreadContext *tc = args.getThreadContext();
+ StringWrap name(tc->getSystemPtr()->name());
Addr addr = (Addr)args;
struct mbuf m;
@@ -57,16 +58,14 @@ DumpMbuf(Arguments args)
int count = m.m_pkthdr.len;
- ccprintf(DebugOut(), "m=%#lx, m->m_pkthdr.len=%#d\n", addr,
- m.m_pkthdr.len);
+ DPRINTFN("m=%#lx, m->m_pkthdr.len=%#d\n", addr, m.m_pkthdr.len);
while (count > 0) {
- ccprintf(DebugOut(), "m=%#lx, m->m_data=%#lx, m->m_len=%d\n",
+ DPRINTFN("m=%#lx, m->m_data=%#lx, m->m_len=%d\n",
addr, m.m_data, m.m_len);
char *buffer = new char[m.m_len];
CopyOut(tc, buffer, m.m_data, m.m_len);
- Trace::dataDump(curTick, tc->getSystemPtr()->name(), (uint8_t *)buffer,
- m.m_len);
+ DDUMPN((uint8_t *)buffer, m.m_len);
delete [] buffer;
count -= m.m_len;
diff --git a/src/kern/tru64/printf.cc b/src/kern/tru64/printf.cc
index 2c767c4d2..4245ac6d0 100644
--- a/src/kern/tru64/printf.cc
+++ b/src/kern/tru64/printf.cc
@@ -44,11 +44,13 @@ namespace tru64 {
void
Printf(TheISA::Arguments args)
{
+ std::ostream &out = Trace::output();
+
char *p = (char *)args++;
- ios::fmtflags saved_flags = DebugOut().flags();
- char old_fill = DebugOut().fill();
- int old_precision = DebugOut().precision();
+ ios::fmtflags saved_flags = out.flags();
+ char old_fill = out.fill();
+ int old_precision = out.precision();
while (*p) {
switch (*p) {
@@ -121,53 +123,53 @@ Printf(TheISA::Arguments args)
case 'P':
case 'p': {
if (hexnum)
- DebugOut() << hex;
+ out << hex;
if (octal)
- DebugOut() << oct;
+ out << oct;
if (format) {
if (!zero)
- DebugOut().setf(ios::showbase);
+ out.setf(ios::showbase);
else {
if (hexnum) {
- DebugOut() << "0x";
+ out << "0x";
width -= 2;
} else if (octal) {
- DebugOut() << "0";
+ out << "0";
width -= 1;
}
}
}
if (zero)
- DebugOut().fill('0');
+ out.fill('0');
if (width > 0)
- DebugOut().width(width);
+ out.width(width);
if (leftjustify && !zero)
- DebugOut().setf(ios::left);
+ out.setf(ios::left);
if (sign) {
if (islong)
- DebugOut() << (int64_t)args;
+ out << (int64_t)args;
else
- DebugOut() << (int32_t)args;
+ out << (int32_t)args;
} else {
if (islong)
- DebugOut() << (uint64_t)args;
+ out << (uint64_t)args;
else
- DebugOut() << (uint32_t)args;
+ out << (uint32_t)args;
}
if (zero)
- DebugOut().fill(' ');
+ out.fill(' ');
if (width > 0)
- DebugOut().width(0);
+ out.width(0);
- DebugOut() << dec;
+ out << dec;
++args;
}
@@ -179,11 +181,11 @@ Printf(TheISA::Arguments args)
s = "<NULL>";
if (width > 0)
- DebugOut().width(width);
+ out.width(width);
if (leftjustify)
- DebugOut().setf(ios::left);
+ out.setf(ios::left);
- DebugOut() << s;
+ out << s;
++args;
}
break;
@@ -204,7 +206,7 @@ Printf(TheISA::Arguments args)
while (width-- > 0) {
char c = (char)(num & mask);
if (c)
- DebugOut() << c;
+ out << c;
num >>= 8;
}
@@ -214,7 +216,7 @@ Printf(TheISA::Arguments args)
case 'b': {
uint64_t n = (uint64_t)args++;
char *s = (char *)args++;
- DebugOut() << s << ": " << n;
+ out << s << ": " << n;
}
break;
case 'n':
@@ -236,33 +238,33 @@ Printf(TheISA::Arguments args)
}
break;
case '%':
- DebugOut() << '%';
+ out << '%';
break;
}
++p;
}
break;
case '\n':
- DebugOut() << endl;
+ out << endl;
++p;
break;
case '\r':
++p;
if (*p != '\n')
- DebugOut() << endl;
+ out << endl;
break;
default: {
size_t len = strcspn(p, "%\n\r\0");
- DebugOut().write(p, len);
+ out.write(p, len);
p += len;
}
}
}
- DebugOut().flags(saved_flags);
- DebugOut().fill(old_fill);
- DebugOut().precision(old_precision);
+ out.flags(saved_flags);
+ out.fill(old_fill);
+ out.precision(old_precision);
}
} // namespace Tru64
diff --git a/src/kern/tru64/tru64_events.cc b/src/kern/tru64/tru64_events.cc
index 851b3a526..0ad89f8bd 100644
--- a/src/kern/tru64/tru64_events.cc
+++ b/src/kern/tru64/tru64_events.cc
@@ -79,7 +79,8 @@ void
PrintfEvent::process(ThreadContext *tc)
{
if (DTRACE(Printf)) {
- DebugOut() << curTick << ": " << tc->getCpuPtr()->name() << ": ";
+ StringWrap name(tc->getSystemPtr()->name());
+ DPRINTFN("");
Arguments args(tc);
tru64::Printf(args);
@@ -90,8 +91,10 @@ void
DebugPrintfEvent::process(ThreadContext *tc)
{
if (DTRACE(DebugPrintf)) {
- if (!raw)
- DebugOut() << curTick << ": " << tc->getCpuPtr()->name() << ": ";
+ if (!raw) {
+ StringWrap name(tc->getSystemPtr()->name());
+ DPRINTFN("");
+ }
Arguments args(tc);
tru64::Printf(args);
diff --git a/src/python/SConscript b/src/python/SConscript
index df1464809..61cab45f3 100644
--- a/src/python/SConscript
+++ b/src/python/SConscript
@@ -108,6 +108,8 @@ def swig_it(basename):
swig_it('main')
swig_it('debug')
swig_it('event')
+swig_it('random')
+swig_it('trace')
# Action function to build the zip archive. Uses the PyZipFile module
# included in the standard Python library.
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index 5df6d03cf..d02bc466b 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -30,11 +30,6 @@ import code, optparse, os, socket, sys
from datetime import datetime
from attrdict import attrdict
-try:
- import info
-except ImportError:
- info = None
-
__all__ = [ 'options', 'arguments', 'main' ]
usage="%prog [m5 options] script.py [script options]"
@@ -142,18 +137,10 @@ add_option("--debug-break", metavar="TIME[,TIME]", action='append', split=',',
set_group("Trace Options")
add_option("--trace-flags", metavar="FLAG[,FLAG]", action='append', split=',',
help="Sets the flags for tracing")
-add_option("--trace-start", metavar="TIME", default='0s',
- help="Start tracing at TIME (must have units)")
-add_option("--trace-cycle", metavar="CYCLE", default='0',
- help="Start tracing at CYCLE")
+add_option("--trace-start", metavar="TIME", type='int',
+ help="Start tracing at TIME (must be in ticks)")
add_option("--trace-file", metavar="FILE", default="cout",
help="Sets the output file for tracing [Default: %default]")
-add_option("--trace-circlebuf", metavar="SIZE", type="int", default=0,
- help="If SIZE is non-zero, turn on the circular buffer with SIZE lines")
-add_option("--no-trace-circlebuf", action="store_const", const=0,
- dest='trace_circlebuf', help=optparse.SUPPRESS_HELP)
-bool_option("trace-dumponexit", default=False,
- help="Dump trace buffer on exit")
add_option("--trace-ignore", metavar="EXPR", action='append', split=':',
help="Ignore EXPR sim objects")
@@ -211,6 +198,8 @@ def parse_args():
return opts,args
def main():
+ import defines
+ import info
import internal
parse_args()
@@ -278,14 +267,19 @@ def main():
for when in options.debug_break:
internal.debug.schedBreakCycle(int(when))
- # set tracing options
- objects.Trace.flags = options.trace_flags
- objects.Trace.start = options.trace_start
- objects.Trace.cycle = options.trace_cycle
- objects.Trace.file = options.trace_file
- objects.Trace.bufsize = options.trace_circlebuf
- objects.Trace.dump_on_exit = options.trace_dumponexit
- objects.Trace.ignore = options.trace_ignore
+ for flag in options.trace_flags:
+ internal.trace.set(flag)
+
+ if options.trace_start is not None:
+ internal.trace.enabled = False
+ def enable_trace():
+ internal.event.enabled = True
+ internal.event.create(enable_trace, options.trace_start)
+
+ internal.trace.output(options.trace_file)
+
+ for ignore in options.trace_ignore:
+ internal.trace.ignore(ignore)
# set execution trace options
objects.ExecutionTrace.speculative = options.speculative
@@ -309,7 +303,7 @@ def main():
# we want readline if we're doing anything interactive
if options.interactive or options.pdb:
- exec("import readline", scope)
+ exec "import readline" in scope
# if pdb was requested, execfile the thing under pdb, otherwise,
# just do the execfile normally
diff --git a/src/python/m5/objects/Root.py b/src/python/m5/objects/Root.py
index b6123f192..81482c1de 100644
--- a/src/python/m5/objects/Root.py
+++ b/src/python/m5/objects/Root.py
@@ -3,7 +3,6 @@ from m5.params import *
from Serialize import Serialize
from Serialize import Statreset
from Statistics import Statistics
-from Trace import Trace
from ExeTrace import ExecutionTrace
class Root(SimObject):
@@ -15,9 +14,7 @@ class Root(SimObject):
output_file = Param.String('cout', "file to dump simulator output to")
checkpoint = Param.String('', "checkpoint file to load")
# stats = Param.Statistics(Statistics(), "statistics object")
-# trace = Param.Trace(Trace(), "trace object")
# serialize = Param.Serialize(Serialize(), "checkpoint generation options")
stats = Statistics()
- trace = Trace()
exetrace = ExecutionTrace()
serialize = Serialize()
diff --git a/src/python/swig/random.i b/src/python/swig/random.i
new file mode 100644
index 000000000..657a59780
--- /dev/null
+++ b/src/python/swig/random.i
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ */
+
+%module random
+
+%include "stdint.i"
+
+%{
+#include <cstdlib>
+
+#include "sim/host.hh"
+
+inline void
+seed(uint64_t seed)
+{
+ ::srand48(seed & ULL(0xffffffffffff));
+}
+%}
+
+%inline %{
+extern void seed(uint64_t seed);
+%}
+
+%wrapper %{
+// fix up module name to reflect the fact that it's inside the m5 package
+#undef SWIG_name
+#define SWIG_name "m5.internal._random"
+%}
diff --git a/src/python/swig/trace.i b/src/python/swig/trace.i
new file mode 100644
index 000000000..69b44c025
--- /dev/null
+++ b/src/python/swig/trace.i
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ */
+
+%module trace
+
+%{
+#include "base/trace.hh"
+#include "sim/host.hh"
+
+inline void
+output(const char *filename)
+{
+ Trace::setOutput(filename);
+}
+
+inline void
+set(const char *flag)
+{
+ Trace::changeFlag(flag, true);
+}
+
+inline void
+clear(const char *flag)
+{
+ Trace::changeFlag(flag, false);
+}
+
+inline void
+ignore(const char *expr)
+{
+ Trace::ignore.setExpression(expr);
+}
+
+using Trace::enabled;
+%}
+
+%inline %{
+extern void output(const char *string);
+extern void set(const char *string);
+extern void clear(const char *string);
+extern void ignore(const char *expr);
+extern bool enabled;
+%}
+
+%wrapper %{
+// fix up module name to reflect the fact that it's inside the m5 package
+#undef SWIG_name
+#define SWIG_name "m5.internal._trace"
+%}
diff --git a/src/sim/main.cc b/src/sim/main.cc
index 04dbe1ef4..9f9a56450 100644
--- a/src/sim/main.cc
+++ b/src/sim/main.cc
@@ -111,11 +111,6 @@ void
abortHandler(int sigtype)
{
cerr << "Program aborted at cycle " << curTick << endl;
-
-#if TRACING_ON
- // dump trace buffer, if there is one
- Trace::theLog.dump(cerr);
-#endif
}
int
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-29 11:27:00 +0000