diff options
| -rw-r--r-- | src/arch/x86/faults.cc | 11 | ||||
| -rw-r--r-- | src/cpu/simple/base.cc | 8 |
2 files changed, 14 insertions, 5 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index 4198bcc7c..093926d36 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -44,6 +44,7 @@ #include "arch/x86/generated/decoder.hh" #include "arch/x86/isa_traits.hh" +#include "base/loader/symtab.hh" #include "base/trace.hh" #include "cpu/thread_context.hh" #include "debug/Faults.hh" @@ -161,7 +162,15 @@ namespace X86ISA modeStr = "write"; else modeStr = "read"; - panic("Tried to %s unmapped address %#x.\n", modeStr, addr); + + // print information about what we are panic'ing on + if (!inst) { + panic("Tried to %s unmapped address %#x.\n", modeStr, addr); + } else { + panic("Tried to %s unmapped address %#x.\nPC: %#x, Instr: %s", + modeStr, addr, tc->pcState().pc(), + inst->disassemble(tc->pcState().pc(), debugSymbolTable)); + } } } diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 5c8eba6ef..1f12afbf0 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -475,13 +475,13 @@ BaseSimpleCPU::setupFetchRequest(Request *req) SimpleThread* thread = t_info.thread; Addr instAddr = thread->instAddr(); + Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset; // set up memory request for instruction fetch - DPRINTF(Fetch, "Fetch: PC:%08p\n", instAddr); + DPRINTF(Fetch, "Fetch: Inst PC:%08p, Fetch PC:%08p\n", instAddr, fetchPC); - Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset; - req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH, instMasterId(), - instAddr); + req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH, + instMasterId(), instAddr); } |