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-rw-r--r--dev/ns_gige.cc9
-rw-r--r--dev/ns_gige.hh1
-rw-r--r--dev/ns_gige_reg.h3
-rw-r--r--python/m5/objects/Ethernet.mpy2
4 files changed, 13 insertions, 2 deletions
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index 47631642c..7560b1994 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -747,6 +747,10 @@ NSGigE::read(MemReqPtr &req, uint8_t *data)
reg = regs.tesr;
break;
+ case M5REG:
+ reg = params()->m5reg;
+ break;
+
default:
panic("reading unimplemented register: addr=%#x", daddr);
}
@@ -2708,6 +2712,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(NSGigE)
Param<uint32_t> pci_func;
Param<uint32_t> tx_fifo_size;
Param<uint32_t> rx_fifo_size;
+ Param<uint32_t> m5reg;
END_DECLARE_SIM_OBJECT_PARAMS(NSGigE)
@@ -2740,7 +2745,8 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(NSGigE)
INIT_PARAM(pci_dev, "PCI device number"),
INIT_PARAM(pci_func, "PCI function code"),
INIT_PARAM_DFLT(tx_fifo_size, "max size in bytes of txFifo", 131072),
- INIT_PARAM_DFLT(rx_fifo_size, "max size in bytes of rxFifo", 131072)
+ INIT_PARAM_DFLT(rx_fifo_size, "max size in bytes of rxFifo", 131072),
+ INIT_PARAM(m5reg, "m5 register")
END_INIT_SIM_OBJECT_PARAMS(NSGigE)
@@ -2777,6 +2783,7 @@ CREATE_SIM_OBJECT(NSGigE)
params->eaddr = hardware_address;
params->tx_fifo_size = tx_fifo_size;
params->rx_fifo_size = rx_fifo_size;
+ params->m5reg = m5reg;
return new NSGigE(params);
}
diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh
index 544a300c3..357f08253 100644
--- a/dev/ns_gige.hh
+++ b/dev/ns_gige.hh
@@ -343,6 +343,7 @@ class NSGigE : public PciDev
Net::EthAddr eaddr;
uint32_t tx_fifo_size;
uint32_t rx_fifo_size;
+ uint32_t m5reg;
};
NSGigE(Params *params);
diff --git a/dev/ns_gige_reg.h b/dev/ns_gige_reg.h
index 01577fa39..ab9833788 100644
--- a/dev/ns_gige_reg.h
+++ b/dev/ns_gige_reg.h
@@ -117,7 +117,8 @@
#define TANLPAR 0xec
#define TANER 0xf0
#define TESR 0xf4
-#define LAST 0xf4
+#define M5REG 0xf8
+#define LAST 0xf8
#define RESERVED 0xfc
/* chip command register */
diff --git a/python/m5/objects/Ethernet.mpy b/python/m5/objects/Ethernet.mpy
index ed95ce233..7cc58421a 100644
--- a/python/m5/objects/Ethernet.mpy
+++ b/python/m5/objects/Ethernet.mpy
@@ -72,6 +72,8 @@ simobj NSGigE(PciDevice):
rx_fifo_size = Param.MemorySize('128kB', "max size in bytes of rxFifo")
tx_fifo_size = Param.MemorySize('128kB', "max size in bytes of txFifo")
+ m5reg = Param.UInt32(0, "Register for m5 usage")
+
intr_delay = Param.Latency('0us', "Interrupt Delay in microseconds")
payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
physmem = Param.PhysicalMemory(parent.any, "Physical Memory")