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-rw-r--r--src/dev/uart8250.cc20
-rw-r--r--src/dev/uart8250.hh1
2 files changed, 16 insertions, 5 deletions
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index ddee33695..d178bd1af 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -68,6 +68,7 @@ Uart8250::IntrEvent::process()
DPRINTF(Uart, "UART InterEvent, interrupting\n");
uart->platform->postConsoleInt();
uart->status |= intrBit;
+ uart->lastTxInt = curTick;
}
else
DPRINTF(Uart, "UART InterEvent, not interrupting\n");
@@ -153,13 +154,13 @@ Uart8250::read(PacketPtr pkt)
if (status & RX_INT) /* Rx data interrupt has a higher priority */
pkt->set(IIR_RXID);
- else if (status & TX_INT)
+ else if (status & TX_INT) {
pkt->set(IIR_TXID);
- else
+ //Tx interrupts are cleared on IIR reads
+ status &= ~TX_INT;
+ } else
pkt->set(IIR_NOPEND);
- //Tx interrupts are cleared on IIR reads
- status &= ~TX_INT;
break;
case 0x3: // Line Control Register (LCR)
pkt->set(LCR);
@@ -222,7 +223,16 @@ Uart8250::write(PacketPtr pkt)
if (UART_IER_THRI & IER)
{
DPRINTF(Uart, "IER: IER_THRI set, scheduling TX intrrupt\n");
- txIntrEvent.scheduleIntr();
+ if (curTick - lastTxInt >
+ (Tick)((Clock::Float::s / 2e9) * 450)) {
+ DPRINTF(Uart, "-- Interrupting Immediately... %d,%d\n",
+ curTick, lastTxInt);
+ txIntrEvent.process();
+ } else {
+ DPRINTF(Uart, "-- Delaying interrupt... %d,%d\n",
+ curTick, lastTxInt);
+ txIntrEvent.scheduleIntr();
+ }
}
else
{
diff --git a/src/dev/uart8250.hh b/src/dev/uart8250.hh
index c28200592..c9c878aed 100644
--- a/src/dev/uart8250.hh
+++ b/src/dev/uart8250.hh
@@ -74,6 +74,7 @@ class Uart8250 : public Uart
protected:
uint8_t IER, DLAB, LCR, MCR;
+ Tick lastTxInt;
class IntrEvent : public Event
{