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-rw-r--r--src/arch/x86/process.hh8
-rw-r--r--src/sim/process.hh2
2 files changed, 6 insertions, 4 deletions
diff --git a/src/arch/x86/process.hh b/src/arch/x86/process.hh
index 4240ee625..fe3134844 100644
--- a/src/arch/x86/process.hh
+++ b/src/arch/x86/process.hh
@@ -43,9 +43,9 @@
#include <string>
#include <vector>
+#include "mem/multi_level_page_table.hh"
#include "sim/aux_vector.hh"
#include "sim/process.hh"
-#include "mem/multi_level_page_table.hh"
class SyscallDesc;
@@ -175,7 +175,8 @@ namespace X86ISA
void argsInit(int pageSize);
void initState();
- void syscall(int64_t callnum, ThreadContext *tc, Fault *fault);
+ void syscall(int64_t callnum, ThreadContext *tc,
+ Fault *fault) override;
X86ISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
X86ISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width);
void setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val);
@@ -186,7 +187,8 @@ namespace X86ISA
/**
* Declaration of architectural page table for x86.
*
- * These page tables are stored in system memory and respect x86 specification.
+ * These page tables are stored in system memory and respect x86
+ * specification.
*/
typedef MultiLevelPageTable<PageTableOps> ArchPageTable;
diff --git a/src/sim/process.hh b/src/sim/process.hh
index add3eb357..5da30a4c3 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -71,7 +71,7 @@ class Process : public SimObject
void initState() override;
DrainState drain() override;
- void syscall(int64_t callnum, ThreadContext *tc, Fault *fault);
+ virtual void syscall(int64_t callnum, ThreadContext *tc, Fault *fault);
virtual TheISA::IntReg getSyscallArg(ThreadContext *tc, int &i) = 0;
virtual TheISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width);
virtual void setSyscallArg(ThreadContext *tc, int i,