diff options
| -rw-r--r-- | arch/alpha/isa/decoder.isa | 10 | ||||
| -rw-r--r-- | cpu/static_inst.hh | 4 |
2 files changed, 11 insertions, 3 deletions
diff --git a/arch/alpha/isa/decoder.isa b/arch/alpha/isa/decoder.isa index 905ace4e1..ac9f9fc4c 100644 --- a/arch/alpha/isa/decoder.isa +++ b/arch/alpha/isa/decoder.isa @@ -73,7 +73,9 @@ decode OPCODE default Unknown::unknown() { uint64_t tmp = write_result; // see stq_c Ra = (tmp == 0 || tmp == 1) ? tmp : Ra; - }}, mem_flags = LOCKED, inst_flags = IsNonSpeculative); + }}, mem_flags = LOCKED, inst_flags = [IsNonSpeculative, + IsSerializing, + IsSerializeAfter]); 0x2f: stq_c({{ Mem.uq = Ra; }}, {{ uint64_t tmp = write_result; @@ -85,7 +87,9 @@ decode OPCODE default Unknown::unknown() { // mailbox access, and we don't update the // result register at all. Ra = (tmp == 0 || tmp == 1) ? tmp : Ra; - }}, mem_flags = LOCKED, inst_flags = IsNonSpeculative); + }}, mem_flags = LOCKED, inst_flags = [IsNonSpeculative, + IsSerializing, + IsSerializeAfter]); } format IntegerOperate { @@ -623,7 +627,7 @@ decode OPCODE default Unknown::unknown() { #else Ra = curTick; #endif - }}, IsNonSpeculative); + }}, IsUnverifiable); // All of the barrier instructions below do nothing in // their execute() methods (hence the empty code blocks). diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 550609ed7..0b8fe2f18 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -51,6 +51,7 @@ class AlphaDynInst; template <class Impl> class OzoneDynInst; +class CheckerCPU; class FastCPU; class SimpleCPU; class InorderCPU; @@ -128,6 +129,8 @@ class StaticInstBase : public RefCounted IsNonSpeculative, ///< Should not be executed speculatively IsQuiesce, + IsUnverifiable, + NumFlags }; @@ -215,6 +218,7 @@ class StaticInstBase : public RefCounted bool isWriteBarrier() const { return flags[IsWriteBarrier]; } bool isNonSpeculative() const { return flags[IsNonSpeculative]; } bool isQuiesce() const { return flags[IsQuiesce]; } + bool isUnverifiable() const { return flags[IsUnverifiable]; } //@} /// Operation class. Used to select appropriate function unit in issue. |