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-rw-r--r--arch/alpha/osfpal.cc2
-rw-r--r--arch/alpha/osfpal.hh1
-rw-r--r--cpu/static_inst.hh2
3 files changed, 4 insertions, 1 deletions
diff --git a/arch/alpha/osfpal.cc b/arch/alpha/osfpal.cc
index 4c0ace8c0..90d645ef1 100644
--- a/arch/alpha/osfpal.cc
+++ b/arch/alpha/osfpal.cc
@@ -224,8 +224,8 @@ namespace {
0, // 0xbc
0, // 0xbd
"nphalt", // 0xbe
+ "copypal", // 0xbf
#if 0
- 0, // 0xbf
0, // 0xc0
0, // 0xc1
0, // 0xc2
diff --git a/arch/alpha/osfpal.hh b/arch/alpha/osfpal.hh
index 61e545306..419235b4a 100644
--- a/arch/alpha/osfpal.hh
+++ b/arch/alpha/osfpal.hh
@@ -70,6 +70,7 @@ struct PAL
gentrap = 0xaa,
clrfen = 0xae,
nphalt = 0xbe,
+ copypal = 0xbf,
NumCodes
};
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 5f4bcae3d..cdf9aefa0 100644
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -96,6 +96,7 @@ class StaticInstBase : public RefCounted
IsStore, ///< Writes to memory.
IsInstPrefetch, ///< Instruction-cache prefetch.
IsDataPrefetch, ///< Data-cache prefetch.
+ IsCopy, ///< Fast Cache block copy
IsControl, ///< Control transfer instruction.
IsDirectControl, ///< PC relative control transfer.
@@ -176,6 +177,7 @@ class StaticInstBase : public RefCounted
bool isStore() const { return flags[IsStore]; }
bool isInstPrefetch() const { return flags[IsInstPrefetch]; }
bool isDataPrefetch() const { return flags[IsDataPrefetch]; }
+ bool isCopy() const { return flags[IsCopy];}
bool isInteger() const { return flags[IsInteger]; }
bool isFloating() const { return flags[IsFloating]; }