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-rw-r--r--src/cpu/simple/timing.cc30
-rw-r--r--src/cpu/simple/timing.hh6
-rw-r--r--src/python/m5/__init__.py30
-rw-r--r--src/python/m5/config.py6
-rw-r--r--src/sim/main.cc14
-rw-r--r--src/sim/sim_events.cc4
-rw-r--r--src/sim/sim_events.hh6
-rw-r--r--src/sim/sim_object.cc20
-rw-r--r--src/sim/sim_object.hh8
9 files changed, 61 insertions, 63 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 877364eff..ad04c8d3b 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -88,7 +88,7 @@ TimingSimpleCPU::TimingSimpleCPU(Params *p)
{
_status = Idle;
ifetch_pkt = dcache_pkt = NULL;
- quiesceEvent = NULL;
+ drainEvent = NULL;
state = SimObject::Timing;
}
@@ -112,18 +112,16 @@ TimingSimpleCPU::unserialize(Checkpoint *cp, const string &section)
}
bool
-TimingSimpleCPU::quiesce(Event *quiesce_event)
+TimingSimpleCPU::drain(Event *drain_event)
{
- // TimingSimpleCPU is ready to quiesce if it's not waiting for
+ // TimingSimpleCPU is ready to drain if it's not waiting for
// an access to complete.
if (status() == Idle || status() == Running || status() == SwitchedOut) {
- DPRINTF(Config, "Ready to quiesce\n");
- changeState(SimObject::QuiescedTiming);
+ changeState(SimObject::DrainedTiming);
return false;
} else {
- DPRINTF(Config, "Waiting to quiesce\n");
- changeState(SimObject::Quiescing);
- quiesceEvent = quiesce_event;
+ changeState(SimObject::Draining);
+ drainEvent = drain_event;
return true;
}
}
@@ -423,8 +421,8 @@ TimingSimpleCPU::completeIfetch(Packet *pkt)
delete pkt->req;
delete pkt;
- if (getState() == SimObject::Quiescing) {
- completeQuiesce();
+ if (getState() == SimObject::Draining) {
+ completeDrain();
return;
}
@@ -480,8 +478,8 @@ TimingSimpleCPU::completeDataAccess(Packet *pkt)
assert(_status == DcacheWaitResponse);
_status = Running;
- if (getState() == SimObject::Quiescing) {
- completeQuiesce();
+ if (getState() == SimObject::Draining) {
+ completeDrain();
delete pkt->req;
delete pkt;
@@ -500,11 +498,11 @@ TimingSimpleCPU::completeDataAccess(Packet *pkt)
void
-TimingSimpleCPU::completeQuiesce()
+TimingSimpleCPU::completeDrain()
{
- DPRINTF(Config, "Done quiescing\n");
- changeState(SimObject::QuiescedTiming);
- quiesceEvent->process();
+ DPRINTF(Config, "Done draining\n");
+ changeState(SimObject::DrainedTiming);
+ drainEvent->process();
}
bool
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index d91144e4a..c360e553e 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -64,7 +64,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
Status status() const { return _status; }
- Event *quiesceEvent;
+ Event *drainEvent;
private:
@@ -133,7 +133,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
- virtual bool quiesce(Event *quiesce_event);
+ virtual bool drain(Event *drain_event);
virtual void resume();
virtual void setMemoryMode(State new_mode);
@@ -154,7 +154,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
void completeDataAccess(Packet *);
void advanceInst(Fault fault);
private:
- void completeQuiesce();
+ void completeDrain();
};
#endif // __CPU_SIMPLE_TIMING_HH__
diff --git a/src/python/m5/__init__.py b/src/python/m5/__init__.py
index 828165d15..579785a46 100644
--- a/src/python/m5/__init__.py
+++ b/src/python/m5/__init__.py
@@ -213,14 +213,14 @@ atexit.register(cc_main.doExitCleanup)
# matter since most scripts will probably 'from m5.objects import *'.
import objects
-def doQuiesce(root):
- quiesce = cc_main.createCountedQuiesce()
- unready_objects = root.startQuiesce(quiesce, True)
- # If we've got some objects that can't quiesce immediately, then simulate
+def doDrain(root):
+ drain_event = cc_main.createCountedDrain()
+ unready_objects = root.startDrain(drain_event, True)
+ # If we've got some objects that can't drain immediately, then simulate
if unready_objects > 0:
- quiesce.setCount(unready_objects)
+ drain_event.setCount(unready_objects)
simulate()
- cc_main.cleanupCountedQuiesce(quiesce)
+ cc_main.cleanupCountedDrain(drain_event)
def resume(root):
root.resume()
@@ -228,7 +228,7 @@ def resume(root):
def checkpoint(root):
if not isinstance(root, objects.Root):
raise TypeError, "Object is not a root object. Checkpoint must be called on a root object."
- doQuiesce(root)
+ doDrain(root)
print "Writing checkpoint"
cc_main.serializeAll()
resume(root)
@@ -241,7 +241,7 @@ def changeToAtomic(system):
if not isinstance(system, objects.Root) and not isinstance(system, System):
raise TypeError, "Object is not a root or system object. Checkpoint must be "
"called on a root object."
- doQuiesce(system)
+ doDrain(system)
print "Changing memory mode to atomic"
system.changeTiming(cc_main.SimObject.Atomic)
resume(system)
@@ -250,7 +250,7 @@ def changeToTiming(system):
if not isinstance(system, objects.Root) and not isinstance(system, System):
raise TypeError, "Object is not a root or system object. Checkpoint must be "
"called on a root object."
- doQuiesce(system)
+ doDrain(system)
print "Changing memory mode to timing"
system.changeTiming(cc_main.SimObject.Timing)
resume(system)
@@ -271,16 +271,16 @@ def switchCpus(cpuList):
if not isinstance(cpu, objects.BaseCPU):
raise TypeError, "%s is not of type BaseCPU", cpu
- # Quiesce all of the individual CPUs
- quiesce = cc_main.createCountedQuiesce()
+ # Drain all of the individual CPUs
+ drain_event = cc_main.createCountedDrain()
unready_cpus = 0
for old_cpu in old_cpus:
- unready_cpus += old_cpu.startQuiesce(quiesce, False)
- # If we've got some objects that can't quiesce immediately, then simulate
+ unready_cpus += old_cpu.startDrain(drain_event, False)
+ # If we've got some objects that can't drain immediately, then simulate
if unready_cpus > 0:
- quiesce.setCount(unready_cpus)
+ drain_event.setCount(unready_cpus)
simulate()
- cc_main.cleanupCountedQuiesce(quiesce)
+ cc_main.cleanupCountedDrain(drain_event)
# Now all of the CPUs are ready to be switched out
for old_cpu in old_cpus:
old_cpu._ccObject.switchOut()
diff --git a/src/python/m5/config.py b/src/python/m5/config.py
index 6f2873d40..cffe06984 100644
--- a/src/python/m5/config.py
+++ b/src/python/m5/config.py
@@ -543,15 +543,15 @@ class SimObject(object):
for child in self._children.itervalues():
child.connectPorts()
- def startQuiesce(self, quiesce_event, recursive):
+ def startDrain(self, drain_event, recursive):
count = 0
# ParamContexts don't serialize
if isinstance(self, SimObject) and not isinstance(self, ParamContext):
- if self._ccObject.quiesce(quiesce_event):
+ if self._ccObject.drain(drain_event):
count = 1
if recursive:
for child in self._children.itervalues():
- count += child.startQuiesce(quiesce_event, True)
+ count += child.startDrain(drain_event, True)
return count
def resume(self):
diff --git a/src/sim/main.cc b/src/sim/main.cc
index 3eb7fa95d..e96a44930 100644
--- a/src/sim/main.cc
+++ b/src/sim/main.cc
@@ -523,19 +523,19 @@ simulate(Tick num_cycles = -1)
}
Event *
-createCountedQuiesce()
+createCountedDrain()
{
- return new CountedQuiesceEvent();
+ return new CountedDrainEvent();
}
void
-cleanupCountedQuiesce(Event *counted_quiesce)
+cleanupCountedDrain(Event *counted_drain)
{
- CountedQuiesceEvent *event =
- dynamic_cast<CountedQuiesceEvent *>(counted_quiesce);
+ CountedDrainEvent *event =
+ dynamic_cast<CountedDrainEvent *>(counted_drain);
if (event == NULL) {
- fatal("Called cleanupCountedQuiesce() on an event that was not "
- "a CountedQuiesceEvent.");
+ fatal("Called cleanupCountedDrain() on an event that was not "
+ "a CountedDrainEvent.");
}
assert(event->getCount() == 0);
delete event;
diff --git a/src/sim/sim_events.cc b/src/sim/sim_events.cc
index 97f7ae03c..d9e8bdeaa 100644
--- a/src/sim/sim_events.cc
+++ b/src/sim/sim_events.cc
@@ -79,10 +79,10 @@ exitSimLoop(const std::string &message, int exit_code)
}
void
-CountedQuiesceEvent::process()
+CountedDrainEvent::process()
{
if (--count == 0) {
- exitSimLoop("Finished quiesce");
+ exitSimLoop("Finished drain");
}
}
diff --git a/src/sim/sim_events.hh b/src/sim/sim_events.hh
index 50368f258..3c4a9dd05 100644
--- a/src/sim/sim_events.hh
+++ b/src/sim/sim_events.hh
@@ -67,13 +67,13 @@ class SimLoopExitEvent : public Event
virtual const char *description();
};
-class CountedQuiesceEvent : public SimLoopExitEvent
+class CountedDrainEvent : public SimLoopExitEvent
{
private:
- // Count down to quiescing
+ // Count of how many objects have not yet drained
int count;
public:
- CountedQuiesceEvent()
+ CountedDrainEvent()
: count(0)
{ }
void process();
diff --git a/src/sim/sim_object.cc b/src/sim/sim_object.cc
index 551555b25..4205b5762 100644
--- a/src/sim/sim_object.cc
+++ b/src/sim/sim_object.cc
@@ -271,22 +271,22 @@ SimObject::recordEvent(const std::string &stat)
}
bool
-SimObject::quiesce(Event *quiesce_event)
+SimObject::drain(Event *drain_event)
{
- if (state != QuiescedAtomic && state != Atomic) {
- panic("Must implement your own quiesce function if it is to be used "
+ if (state != DrainedAtomic && state != Atomic) {
+ panic("Must implement your own drain function if it is to be used "
"in timing mode!");
}
- state = QuiescedAtomic;
+ state = DrainedAtomic;
return false;
}
void
SimObject::resume()
{
- if (state == QuiescedAtomic) {
+ if (state == DrainedAtomic) {
state = Atomic;
- } else if (state == QuiescedTiming) {
+ } else if (state == DrainedTiming) {
state = Timing;
}
}
@@ -295,10 +295,10 @@ void
SimObject::setMemoryMode(State new_mode)
{
assert(new_mode == Timing || new_mode == Atomic);
- if (state == QuiescedAtomic && new_mode == Timing) {
- state = QuiescedTiming;
- } else if (state == QuiescedTiming && new_mode == Atomic) {
- state = QuiescedAtomic;
+ if (state == DrainedAtomic && new_mode == Timing) {
+ state = DrainedTiming;
+ } else if (state == DrainedTiming && new_mode == Atomic) {
+ state = DrainedAtomic;
} else {
state = new_mode;
}
diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh
index e0b21782f..4833192d6 100644
--- a/src/sim/sim_object.hh
+++ b/src/sim/sim_object.hh
@@ -62,9 +62,9 @@ class SimObject : public Serializable, protected StartupCallback
enum State {
Atomic,
Timing,
- Quiescing,
- QuiescedAtomic,
- QuiescedTiming
+ Draining,
+ DrainedAtomic,
+ DrainedTiming
};
protected:
@@ -117,7 +117,7 @@ class SimObject : public Serializable, protected StartupCallback
// Methods to drain objects in order to take checkpoints
// Or switch from timing -> atomic memory model
// Quiesce returns true if the SimObject cannot quiesce immediately.
- virtual bool quiesce(Event *quiesce_event);
+ virtual bool drain(Event *drain_event);
virtual void resume();
virtual void setMemoryMode(State new_mode);
virtual void switchOut();
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-29 13:33:15 +0000