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-rw-r--r--src/arch/x86/faults.cc16
-rw-r--r--src/arch/x86/faults.hh2
-rw-r--r--src/arch/x86/tlb.cc16
3 files changed, 18 insertions, 16 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index 20b5a931e..836a78567 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -267,6 +267,22 @@ namespace X86ISA
tc->setNextPC(tc->readPC() + sizeof(MachInst));
}
+#else
+
+ void
+ PageFault::invoke(ThreadContext * tc)
+ {
+ PageFaultErrorCode code = errorCode;
+ const char *modeStr = "";
+ if (code.fetch)
+ modeStr = "execute";
+ else if (code.write)
+ modeStr = "write";
+ else
+ modeStr = "read";
+ panic("Tried to %s unmapped address %#x.\n", modeStr, addr);
+ }
+
#endif
} // namespace X86ISA
diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh
index 01d75fe17..bf3b6c8de 100644
--- a/src/arch/x86/faults.hh
+++ b/src/arch/x86/faults.hh
@@ -327,9 +327,9 @@ namespace X86ISA
errorCode = code;
}
-#if FULL_SYSTEM
void invoke(ThreadContext * tc);
+#if FULL_SYSTEM
virtual std::string describe() const;
#endif
};
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 43b1ba04e..78efd5b69 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -619,21 +619,7 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation,
success = p->pTable->lookup(vaddr, newEntry);
}
if (!success) {
- if (req->isPrefetch()) {
- return new PageFault(vaddr, true, mode, true, false);
- } else {
- const char *modeStr = "";
- if (mode == Execute)
- modeStr = "execute";
- else if (mode == Read)
- modeStr = "read";
- else if (mode == Write)
- modeStr = "write";
- else
- modeStr = "?";
- panic("Tried to %s unmapped address %#x.\n",
- modeStr, vaddr);
- }
+ return new PageFault(vaddr, true, mode, true, false);
} else {
Addr alignedVaddr = p->pTable->pageAlign(vaddr);
DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,