diff options
| -rw-r--r-- | src/arch/sparc/isa/decoder.isa | 5 | ||||
| -rw-r--r-- | src/arch/sparc/isa/operands.isa | 12 | ||||
| -rw-r--r-- | util/m5/Makefile.sparc | 4 | ||||
| -rw-r--r-- | util/m5/m5.c | 16 | ||||
| -rw-r--r-- | util/m5/m5op_sparc.S | 21 |
5 files changed, 24 insertions, 34 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 3684cda69..0382aa35e 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -1015,6 +1015,11 @@ decode OP default Unknown::unknown() // we have 7 bits of space here to play with... 0x21: m5exit({{PseudoInst::m5exit(xc->tcBase(), O0); }}, No_OpClass, IsNonSpeculative); + 0x50: m5readfile({{ + O0 = PseudoInst::readfile(xc->tcBase(), O0, O1, O2); + }}, IsNonSpeculative); + 0x51: m5break({{PseudoInst::debugbreak(xc->tcBase()); + }}, IsNonSpeculative); 0x54: m5panic({{ panic("M5 panic instruction called at pc=%#x.", xc->readPC()); }}, No_OpClass, IsNonSpeculative); diff --git a/src/arch/sparc/isa/operands.isa b/src/arch/sparc/isa/operands.isa index 82e9407de..092544aab 100644 --- a/src/arch/sparc/isa/operands.isa +++ b/src/arch/sparc/isa/operands.isa @@ -100,12 +100,12 @@ def operands {{ 'R1': ('IntReg', 'udw', '1', None, 7), 'R15': ('IntReg', 'udw', '15', 'IsInteger', 8), 'R16': ('IntReg', 'udw', '16', None, 9), - 'O0': ('IntReg', 'udw', '24', 'IsInteger', 10), - 'O1': ('IntReg', 'udw', '25', 'IsInteger', 11), - 'O2': ('IntReg', 'udw', '26', 'IsInteger', 12), - 'O3': ('IntReg', 'udw', '27', 'IsInteger', 13), - 'O4': ('IntReg', 'udw', '28', 'IsInteger', 14), - 'O5': ('IntReg', 'udw', '29', 'IsInteger', 15), + 'O0': ('IntReg', 'udw', '8', 'IsInteger', 10), + 'O1': ('IntReg', 'udw', '9', 'IsInteger', 11), + 'O2': ('IntReg', 'udw', '10', 'IsInteger', 12), + 'O3': ('IntReg', 'udw', '11', 'IsInteger', 13), + 'O4': ('IntReg', 'udw', '12', 'IsInteger', 14), + 'O5': ('IntReg', 'udw', '13', 'IsInteger', 15), # Control registers # 'Y': ('ControlReg', 'udw', 'MISCREG_Y', None, 40), diff --git a/util/m5/Makefile.sparc b/util/m5/Makefile.sparc index 835ccb2a4..76d82857b 100644 --- a/util/m5/Makefile.sparc +++ b/util/m5/Makefile.sparc @@ -35,7 +35,7 @@ CC=$(CROSS_COMPILE)gcc AS=$(CROSS_COMPILE)as LD=$(CROSS_COMPILE)ld -CFLAGS=-O2 +CFLAGS=-O2 -m64 OBJS=m5.o m5op_sparc.o all: m5 @@ -47,7 +47,7 @@ all: m5 $(CC) $(CFLAGS) -o $@ -c $< m5: $(OBJS) - $(CC) -o $@ $(OBJS) + $(CC) -m64 -o $@ $(OBJS) clean: rm -f *.o m5 diff --git a/util/m5/m5.c b/util/m5/m5.c index 190289f06..b103796a8 100644 --- a/util/m5/m5.c +++ b/util/m5/m5.c @@ -186,21 +186,5 @@ main(int argc, char *argv[]) m5_loadsymbol(arg1); return 0; } - if (COMPARE("readfile")) { - char buf[256*1024]; - int offset = 0; - int len; - - if (argc != 2) - usage(); - - while ((len = m5_readfile(buf, sizeof(buf), offset)) > 0) { - write(STDOUT_FILENO, buf, len); - offset += len; - } - - return 0; - } - usage(); } diff --git a/util/m5/m5op_sparc.S b/util/m5/m5op_sparc.S index b5c421bdf..40248ff8b 100644 --- a/util/m5/m5op_sparc.S +++ b/util/m5/m5op_sparc.S @@ -49,8 +49,10 @@ func: #define END(func) \ .size func, (.-func) +#define DEBUGBREAK INST(debugbreak_func, 0, 0, 0) #define M5EXIT INST(exit_func, 0, 0, 0) #define PANIC INST(panic_func, 0, 0, 0) +#define READFILE INST(readfile_func, 0, 0, 0) LEAF(m5_exit) retl @@ -62,6 +64,15 @@ LEAF(m5_panic) PANIC END(m5_panic) +LEAF(m5_readfile) + retl + READFILE +END(m5_readfile) + +LEAF(m5_debugbreak) + retl + DEBUGBREAK +END(m5_debugbreak) /* !!!!!! All code below here just panics !!!!!! */ LEAF(arm) @@ -119,16 +130,6 @@ LEAF(m5_checkpoint) PANIC END(m5_checkpoint) -LEAF(m5_readfile) - retl - PANIC -END(m5_readfile) - -LEAF(m5_debugbreak) - retl - PANIC -END(m5_debugbreak) - LEAF(m5_switchcpu) retl PANIC |