diff options
| -rw-r--r-- | dev/tsunami.hh | 39 | ||||
| -rw-r--r-- | dev/tsunami_cchip.cc | 3 | ||||
| -rw-r--r-- | dev/tsunami_io.cc | 7 | ||||
| -rw-r--r-- | dev/tsunami_uart.cc | 4 |
4 files changed, 45 insertions, 8 deletions
diff --git a/dev/tsunami.hh b/dev/tsunami.hh index 57e4b8991..e6623899d 100644 --- a/dev/tsunami.hh +++ b/dev/tsunami.hh @@ -26,6 +26,12 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/** + * @file + * Declaration of top level class for the Tsunami chipset. This class just retains pointers + * to all its children so the children can communicate + */ + #ifndef __TSUNAMI_HH__ #define __TSUNAMI_HH__ @@ -39,29 +45,60 @@ class TlaserClock; class EtherDev; class TsunamiCChip; class TsunamiPChip; +class TsunamiPCIConfig; + +/** + * Top level class for Tsunami Chipset emulation. + * This structure just contains pointers to all the + * children so the children can commnicate to do the + * read work + */ class Tsunami : public SimObject { public: + /** Max number of CPUs in a Tsunami */ static const int Max_CPUs = 4; + /** Pointer to the interrupt controller (used to post and ack interrupts on the CPU) */ IntrControl *intrctrl; -// ConsoleListener *listener; + /** Pointer to the UART emulation code */ SimConsole *cons; + /** Pointer to the SCSI controller device */ ScsiController *scsi; + /** Pointer to the ethernet controller device */ EtherDev *ethernet; + /** Pointer to the Tsunami CChip. + * The chip contains some configuration information and + * all the interrupt mask and status registers + */ TsunamiCChip *cchip; + + /** Pointer to the Tsunami PChip. + * The pchip is the interface to the PCI bus, in our case + * it does not have to do much. + */ TsunamiPChip *pchip; + /** Pointer to the Tsunami PCI Config Space + * The config space in tsunami all needs to return + * -1 if a device is not there. + */ + TsunamiPCIConfig *pciconfig; + int intr_sum_type[Tsunami::Max_CPUs]; int ipi_pending[Tsunami::Max_CPUs]; int interrupt_frequency; public: + /** + * Constructor for the Tsunami Class. + * @param + */ Tsunami(const std::string &name, ScsiController *scsi, EtherDev *ethernet, SimConsole *, IntrControl *intctrl, int intrFreq); diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc index 9dba502e4..9bb9be13f 100644 --- a/dev/tsunami_cchip.cc +++ b/dev/tsunami_cchip.cc @@ -11,9 +11,6 @@ #include "base/trace.hh" #include "cpu/exec_context.hh" #include "dev/console.hh" -#include "dev/etherdev.hh" -#include "dev/scsi_ctrl.hh" -#include "dev/tlaser_clock.hh" #include "dev/tsunami_cchip.hh" #include "dev/tsunamireg.h" #include "dev/tsunami.hh" diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc index cfa91a67d..c6447cf64 100644 --- a/dev/tsunami_io.cc +++ b/dev/tsunami_io.cc @@ -194,8 +194,11 @@ TsunamiIO::read(MemReqPtr req, uint8_t *data) Fault TsunamiIO::write(MemReqPtr req, const uint8_t *data) { - DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x\n", - req->vaddr, req->size, req->vaddr & 0xfff); + uint8_t dt = *(uint8_t*)data; + uint64_t dt64 = dt; + + DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n", + req->vaddr, req->size, req->vaddr & 0xfff, dt64); Addr daddr = (req->paddr & addr_mask); diff --git a/dev/tsunami_uart.cc b/dev/tsunami_uart.cc index 373f3eb0d..870258a6e 100644 --- a/dev/tsunami_uart.cc +++ b/dev/tsunami_uart.cc @@ -110,8 +110,8 @@ TsunamiUart::read(MemReqPtr req, uint8_t *data) *data = 0; return No_Fault; } - - panic("%s: read daddr=%#x type=read *data=%#x\n", name(), daddr, *data); + *data = 0; + // panic("%s: read daddr=%#x type=read *data=%#x\n", name(), daddr, *data); return No_Fault; } |