13 files changed, 53 insertions, 3 deletions

diff --git a/SConstruct b/SConstruct
index e91cc0599..0540ba80f 100755
--- a/SConstruct
+++ b/SConstruct
@@ -528,7 +528,8 @@ if main['GCC']:
     main.Append(CCFLAGS=['-pipe'])
     main.Append(CCFLAGS=['-fno-strict-aliasing'])
     main.Append(CCFLAGS=['-Wall', '-Wno-sign-compare', '-Wundef'])
-    main.Append(CXXFLAGS=['-Wmissing-field-initializers'])
+    main.Append(CXXFLAGS=['-Wmissing-field-initializers',
+                          '-Woverloaded-virtual'])
     main.Append(CXXFLAGS=['-std=c++0x'])
 
     # Check for versions with bugs
@@ -578,7 +579,8 @@ elif main['CLANG']:
     # Ruby makes frequent use of extraneous parantheses in the printing
     # of if-statements
     main.Append(CCFLAGS=['-Wno-parentheses'])
-    main.Append(CXXFLAGS=['-Wmissing-field-initializers'])
+    main.Append(CXXFLAGS=['-Wmissing-field-initializers',
+                          '-Woverloaded-virtual'])
     main.Append(CXXFLAGS=['-std=c++0x'])
     # On Mac OS X/Darwin we need to also use libc++ (part of XCode) as
     # opposed to libstdc++ to make the transition from TR1 to
diff --git a/src/arch/alpha/isa/branch.isa b/src/arch/alpha/isa/branch.isa
index def6f3c1d..b60cb6d1e 100644
--- a/src/arch/alpha/isa/branch.isa
+++ b/src/arch/alpha/isa/branch.isa
@@ -83,6 +83,9 @@ output header {{
 
         AlphaISA::PCState branchTarget(const AlphaISA::PCState &branchPC) const;
 
+        /// Explicitly import the otherwise hidden branchTarget
+        using StaticInst::branchTarget;
+
         std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
     };
@@ -108,6 +111,9 @@ output header {{
 
         AlphaISA::PCState branchTarget(ThreadContext *tc) const;
 
+        /// Explicitly import the otherwise hidden branchTarget
+        using StaticInst::branchTarget;
+
         std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
     };
diff --git a/src/arch/alpha/process.hh b/src/arch/alpha/process.hh
index 40d6bf48a..8c8288341 100644
--- a/src/arch/alpha/process.hh
+++ b/src/arch/alpha/process.hh
@@ -49,6 +49,8 @@ class AlphaLiveProcess : public LiveProcess
 
   public:
     AlphaISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+    /// Explicitly import the otherwise hidden getSyscallArg
+    using LiveProcess::getSyscallArg;
     void setSyscallArg(ThreadContext *tc, int i, AlphaISA::IntReg val);
     void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
 };
diff --git a/src/arch/arm/isa/templates/branch.isa b/src/arch/arm/isa/templates/branch.isa
index 6edfb0ee0..ee06bf573 100644
--- a/src/arch/arm/isa/templates/branch.isa
+++ b/src/arch/arm/isa/templates/branch.isa
@@ -74,6 +74,9 @@ class %(class_name)s : public %(base_class)s
                        ConditionCode _condCode);
         %(BasicExecDeclare)s
         ArmISA::PCState branchTarget(const ArmISA::PCState &branchPC) const;
+
+        /// Explicitly import the otherwise hidden branchTarget
+        using StaticInst::branchTarget;
 };
 }};
 
diff --git a/src/arch/arm/linux/process.hh b/src/arch/arm/linux/process.hh
index 854b0b176..7d3a943ed 100644
--- a/src/arch/arm/linux/process.hh
+++ b/src/arch/arm/linux/process.hh
@@ -45,6 +45,8 @@ class ArmLinuxProcess : public ArmLiveProcess
     void initState();
 
     ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+    /// Explicitly import the otherwise hidden getSyscallArg
+    using ArmLiveProcess::getSyscallArg;
     void setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val);
 
     /// The target system's hostname.
diff --git a/src/arch/arm/process.hh b/src/arch/arm/process.hh
index 26a59323f..f8d821037 100644
--- a/src/arch/arm/process.hh
+++ b/src/arch/arm/process.hh
@@ -53,7 +53,7 @@ class ArmLiveProcess : public LiveProcess
   public:
     void argsInit(int intSize, int pageSize);
 
-    uint64_t getSyscallArg(ThreadContext *tc, int &i, int width);
+    ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width);
     ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
     void setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val);
     void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
diff --git a/src/arch/mips/isa/formats/branch.isa b/src/arch/mips/isa/formats/branch.isa
index ecc62d75d..f826e1083 100644
--- a/src/arch/mips/isa/formats/branch.isa
+++ b/src/arch/mips/isa/formats/branch.isa
@@ -91,6 +91,9 @@ output header {{
 
         MipsISA::PCState branchTarget(const MipsISA::PCState &branchPC) const;
 
+        /// Explicitly import the otherwise hidden branchTarget
+        using StaticInst::branchTarget;
+
         std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
     };
@@ -118,6 +121,9 @@ output header {{
 
         MipsISA::PCState branchTarget(ThreadContext *tc) const;
 
+        /// Explicitly import the otherwise hidden branchTarget
+        using StaticInst::branchTarget;
+
         std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
     };
diff --git a/src/arch/mips/process.hh b/src/arch/mips/process.hh
index 3f9a7aff0..a126344ca 100644
--- a/src/arch/mips/process.hh
+++ b/src/arch/mips/process.hh
@@ -53,6 +53,8 @@ class MipsLiveProcess : public LiveProcess
 
   public:
     MipsISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+    /// Explicitly import the otherwise hidden getSyscallArg
+    using LiveProcess::getSyscallArg;
     void setSyscallArg(ThreadContext *tc, int i, MipsISA::IntReg val);
     void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
 };
diff --git a/src/arch/power/insts/branch.hh b/src/arch/power/insts/branch.hh
index 1947e4ec3..762e55a66 100644
--- a/src/arch/power/insts/branch.hh
+++ b/src/arch/power/insts/branch.hh
@@ -88,6 +88,9 @@ class BranchPCRel : public PCDependentDisassembly
 
     PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
 
+    /// Explicitly import the otherwise hidden branchTarget
+    using StaticInst::branchTarget;
+
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
@@ -114,6 +117,9 @@ class BranchNonPCRel : public PCDependentDisassembly
 
     PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
 
+    /// Explicitly import the otherwise hidden branchTarget
+    using StaticInst::branchTarget;
+
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
@@ -189,6 +195,9 @@ class BranchPCRelCond : public BranchCond
 
     PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
 
+    /// Explicitly import the otherwise hidden branchTarget
+    using StaticInst::branchTarget;
+
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
@@ -215,6 +224,9 @@ class BranchNonPCRelCond : public BranchCond
 
     PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const;
 
+    /// Explicitly import the otherwise hidden branchTarget
+    using StaticInst::branchTarget;
+
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
@@ -233,6 +245,9 @@ class BranchRegCond : public BranchCond
 
     PowerISA::PCState branchTarget(ThreadContext *tc) const;
 
+    /// Explicitly import the otherwise hidden branchTarget
+    using StaticInst::branchTarget;
+
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
diff --git a/src/arch/power/linux/process.hh b/src/arch/power/linux/process.hh
index c4600129e..e3f3071b8 100644
--- a/src/arch/power/linux/process.hh
+++ b/src/arch/power/linux/process.hh
@@ -46,6 +46,8 @@ class PowerLinuxProcess : public PowerLiveProcess
     void initState();
 
     PowerISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+    /// Explicitly import the otherwise hidden getSyscallArg
+    using LiveProcess::getSyscallArg;
     void setSyscallArg(ThreadContext *tc, int i, PowerISA::IntReg val);
 
     /// Array of syscall descriptors, indexed by call number.
diff --git a/src/arch/power/process.hh b/src/arch/power/process.hh
index e02a30abd..977b75ae8 100644
--- a/src/arch/power/process.hh
+++ b/src/arch/power/process.hh
@@ -52,6 +52,8 @@ class PowerLiveProcess : public LiveProcess
   public:
     void argsInit(int intSize, int pageSize);
     PowerISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+    /// Explicitly import the otherwise hidden getSyscallArg
+    using LiveProcess::getSyscallArg;
     void setSyscallArg(ThreadContext *tc, int i, PowerISA::IntReg val);
     void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
 };
diff --git a/src/arch/sparc/process.hh b/src/arch/sparc/process.hh
index a9a4247fc..119f608ba 100644
--- a/src/arch/sparc/process.hh
+++ b/src/arch/sparc/process.hh
@@ -94,6 +94,9 @@ class Sparc32LiveProcess : public SparcLiveProcess
     void flushWindows(ThreadContext *tc);
 
     SparcISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+    /// Explicitly import the otherwise hidden getSyscallArg
+    using LiveProcess::getSyscallArg;
+
     void setSyscallArg(ThreadContext *tc, int i, SparcISA::IntReg val);
 };
 
@@ -122,6 +125,9 @@ class Sparc64LiveProcess : public SparcLiveProcess
     void flushWindows(ThreadContext *tc);
 
     SparcISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+    /// Explicitly import the otherwise hidden getSyscallArg
+    using LiveProcess::getSyscallArg;
+
     void setSyscallArg(ThreadContext *tc, int i, SparcISA::IntReg val);
 };
 
diff --git a/src/arch/x86/process.hh b/src/arch/x86/process.hh
index 98e17715a..6a221e792 100644
--- a/src/arch/x86/process.hh
+++ b/src/arch/x86/process.hh
@@ -103,6 +103,8 @@ namespace X86ISA
         void initState();
 
         X86ISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
+        /// Explicitly import the otherwise hidden getSyscallArg
+        using LiveProcess::getSyscallArg;
         void setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val);
     };