diff options
| -rw-r--r-- | src/arch/x86/isa/formats/formats.isa | 3 | ||||
| -rw-r--r-- | src/arch/x86/isa/macroop.isa (renamed from src/arch/x86/isa/formats/macroop.isa) | 22 | ||||
| -rw-r--r-- | src/arch/x86/isa/main.isa | 28 | ||||
| -rw-r--r-- | src/arch/x86/isa/microasm.isa | 2 | ||||
| -rw-r--r-- | src/arch/x86/isa/microops/base.isa | 3 |
5 files changed, 35 insertions, 23 deletions
diff --git a/src/arch/x86/isa/formats/formats.isa b/src/arch/x86/isa/formats/formats.isa index f4e5c402f..d763c05bc 100644 --- a/src/arch/x86/isa/formats/formats.isa +++ b/src/arch/x86/isa/formats/formats.isa @@ -95,9 +95,6 @@ //malfunction of the decode mechanism. ##include "error.isa" -//Include code to build up macro op instructions -##include "macroop.isa" - //Include a format which implements a batch of instructions which do the same //thing on a variety of inputs ##include "multi.isa" diff --git a/src/arch/x86/isa/formats/macroop.isa b/src/arch/x86/isa/macroop.isa index 455f4a496..7d41a2dea 100644 --- a/src/arch/x86/isa/formats/macroop.isa +++ b/src/arch/x86/isa/macroop.isa @@ -55,16 +55,20 @@ // // Authors: Gabe Black -//////////////////////////////////////////////////////////////////// -// -// Instructions that do the same thing to multiple sets of arguments. -// +// Execute method for macroops. +def template MacroExecPanic {{ + Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const + { + panic("Tried to execute macroop directly!"); + M5_DUMMY_RETURN + } +}}; output header {{ // Base class for most macroops, except ones that need to commit as // they go. - class X86MacroInst : public X86StaticInst + class X86MacroInst : public StaticInst { protected: const uint32_t numMicroOps; @@ -72,7 +76,7 @@ output header {{ //Constructor. X86MacroInst(const char *mnem, ExtMachInst _machInst, uint32_t _numMicroOps) - : X86StaticInst(mnem, _machInst, No_OpClass), + : StaticInst(mnem, _machInst, No_OpClass), numMicroOps(_numMicroOps) { assert(numMicroOps); @@ -93,7 +97,7 @@ output header {{ return microOps[microPC]; } - %(BasicExecPanic)s + %(MacroExecPanic)s }; }}; @@ -110,7 +114,7 @@ def template MacroConstructor {{ }}; let {{ - def genMacroOp(name, Name, opSeq, rolling = False): + def genMacroOp(name, Name, opSeq): baseClass = 'X86MacroInst' numMicroOps = len(opSeq.ops) allocMicroOps = '' @@ -118,7 +122,7 @@ let {{ for op in opSeq.ops: allocMicroOps += \ "microOps[%d] = %s;\n" % \ - (micropc, op.getAllocator(True, not rolling, + (micropc, op.getAllocator(True, op.delayed, micropc == 0, micropc == numMicroOps - 1)) micropc += 1 diff --git a/src/arch/x86/isa/main.isa b/src/arch/x86/isa/main.isa index cc3a9bee4..d9e90689d 100644 --- a/src/arch/x86/isa/main.isa +++ b/src/arch/x86/isa/main.isa @@ -72,26 +72,34 @@ namespace X86ISA; -//Include the simple microcode assembler +//Include the simple microcode assembler. This will hopefully stay +//unspecialized for x86 and can later be made available to other ISAs. ##include "microasm.isa" -//Include the bitfield definitions -##include "bitfields.isa" - -//Include the operand_types and operand definitions -##include "operands.isa" +//Include code to build macroops. +##include "macroop.isa" //Include the base class for x86 instructions, and some support code +//Code in this file should be general and useful everywhere ##include "base.isa" -//Include the instruction definitions -##include "insts/insts.isa" - //Include the definitions for the instruction formats ##include "formats/formats.isa" -//Include the definitions of the micro ops +//Include the operand_types and operand definitions. These are needed by +//the microop definitions. +##include "operands.isa" + +//Include the definitions of the micro ops. +//These are StaticInst classes which stand on their own and make up an +//internal instruction set. ##include "microops/microops.isa" +//Include the instruction definitions which are microop assembler programs. +##include "insts/insts.isa" + +//Include the bitfield definitions +##include "bitfields.isa" + //Include the decoder definition ##include "decoder/decoder.isa" diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index b94b55aab..0d9c2bc4c 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -69,7 +69,7 @@ let {{ # use that directly. newStmnt = '' if len(ops) == 1: - decode_block = "return (X86StaticInst *)(%s);" % \ + decode_block = "return %s;" % \ ops[0].getAllocator() return ('', '', decode_block, '') else: diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa index b1351d999..beaa44b97 100644 --- a/src/arch/x86/isa/microops/base.isa +++ b/src/arch/x86/isa/microops/base.isa @@ -69,6 +69,9 @@ output header {{ class X86MicroOpBase : public X86StaticInst { protected: + uint8_t opSize; + uint8_t addrSize; + X86MicroOpBase(bool isMicro, bool isDelayed, bool isFirst, bool isLast, const char *mnem, ExtMachInst _machInst, |